Xian Longtium Microelectronics Technology Developing Co.

Fengcheng, China

Xian Longtium Microelectronics Technology Developing Co.

Fengcheng, China

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Li Y.-N.,Xidian University | Yang Y.-T.,Xidian University | Zhu Z.-M.,Xidian University | Qiang W.,Xian Longtium Microelectronics Technology Developing Co.
Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology | Year: 2011

The method of feedforward current control slope compensation and its circuit structure are proposed. With this method, the zero-crossing distortion of boundary boost Power Factor Correction (PFC) converter is reduced, for improving limits for harmonic current and frequency of the system. Based on boundary boost PFC converter topology, the modulation of Pulse Width Modulation (PWM) signal duty cycle is analyzed theoretically by the feedforward current control slope compensation technology. The relationship between the compensation slope and input line voltage is derived, which forces the current to follow the input voltage in the vicinity of the ac line voltage zero-crossing points. Simulation and experimental results reveal that, the zero-crossing distortion of the system could be suppressed efficiently with this method, as well as improved system dynamic performance, especially under the condition of high frequency or light load. The measured Total Harmonic Distortion (THD) of the Boost PFC converter is only 3.8%, the power factor is 0.988, the load adjust is 3%, the linear adjust rate is less than 1%, and the efficiency is 97.3%. The active die area is 1.61×1.52 mm2.


Li Y.,Xidian University | Yang Y.,Xidian University | Zhu Z.,Xidian University | Qiang W.,Xian Longtium Microelectronics Technology Developing Co. | Liu L.,Xidian University
Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University | Year: 2012

To reduce the total harmonic distortion (THD) and increase power efficiency, based on a critical conduction mode (CRM) power factor correction (PFC) converter with one cycle control, the optimization of the zero-crossing distortion is discussed. The introduced periodic self-starting timer could provide a trigger signal to open a new cycle no matter whether the inductor current decreases to zero, thus avoiding the conduction delay produced by the reverse leakage current of the inductor with less zero-crossing distortion and THD. An adjustable shunt resistor connected between the auxiliary winding and the oscillator could regulate the output signal slope of the oscillator to control the PWM turn-off time by monitoring the inductor current of the auxiliary winding real time. It could effectively reduce the current distortion in the vicinity of the input voltage zero-crossing points. The higher the frequency of ac input line voltage, the better the optimization. At 50 Hz 220 V AC, the input current is 120 mA, the output power is 36 W, the experimental THD of improved PFC converter is only 3.8%, the power factor is 0.988, the load adjust rate is 3%, the linear adjust rate is less than 1%, and the efficiency is 97.3%. Both theoretical and practical results reveal that the zero-crossing distortion and THD are reduced efficiently after optimization, especially when the ac line voltage is close to zero. The active die area is 1.61 mm× 1.52 mm.


Li Y.,Xidian University | Yang Y.,Xidian University | Zhu Z.,Xidian University | Qiang W.,XiAn Longtium Microelectronics Technology Developing Co.
Journal of Semiconductors | Year: 2012

For low-power low total harmonic distortion (THD), based on the CSMC 0.5 μm BCD process, a novel boost power factor correction (PFC) converter in critical conduction mode is discussed and analyzed. Feedforward compensation design is introduced in order to increase the PWM duty cycle and supply more conversion energy near the input voltage zero-crossing points, thus regulating the inductor current of the PFC converter and compensating the system loop gain change with ac line voltage. Both theoretical and practical results reveal that the proposed PFC converter with feedforward compensation cell has better power factor and THD performance, and is suitable for low-power low THD design applications. The experimental THD of the boost PFC converter is 4.5%, the start-up current is 54 μA, the stable operating current is 3.85 mA, the power factor is 0.998 and the efficiency is 95.2%. © 2012 Chinese Institute of Electronics.


Li Y.,Xidian University | Yang Y.,Xidian University | Zhu Z.,Xidian University | Qiang W.,Xian Longtium Microelectronics Technology Developing Co.
Proceedings of International Conference on ASIC | Year: 2011

A low-power low THD boost PFC with one cycle control is discussed. Two novel structures, the periodic self-starting timer and feedforward current control block, are introduced to reduce the zero-crossing distortion. The improved boost PFC could regulate the switch turn-on time timely according to the ac input line voltage, and reduce the distortion near the input voltage zero-crossing points significantly. The experimental THD is only 3.8%, the power factor is 0.998, the load adjust rate is 3%, the linear adjust rate is less than 1%, and the efficiency is 96.9%. Both theoretical and practical results reveal that the improved PFC meets the demands for low-power and low THD. © 2011 IEEE.


Li Y.,Xidian University | Yang Y.,Xidian University | Zhu Z.,Xidian University | Qiang W.,Xian Longtium Microelectronics Technology Developing Co.
Proceedings of International Conference on ASIC | Year: 2011

A novel 4-quadrant analog multiplier for PFC converters is presented based on CSMC 0.5μm BCD process. Gilbert cell is utilized to increase the dynamic input voltage range. The feedforward control technology is introduced to add 1/V 2 to the multiplier output signal, where V in proportional to the input line voltage of PFC. This feedforward control cell efficiently compensates the loop gain of PFC and supplies more conversion energy to reduce THD. The simulated results show that the multiplier has an input voltage range of 0∼3V when the reference signal of the inner voltage loop changes from 0 to 5.5V, THD is less than 0.75%. The proposed multiplier has a good linearity and a low THD. © 2011 IEEE.

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