Wuxi Branch of Southeast University

Wuxi, China

Wuxi Branch of Southeast University

Wuxi, China
Time filter
Source Type

Wu J.,Wuxi Branch of Southeast University | Jiang Q.,Nanjing Southeast University | Song K.,Nanjing Southeast University | Zheng L.,Wuxi Branch of Southeast University | And 2 more authors.
IEEE Transactions on Circuits and Systems II: Express Briefs | Year: 2017

This brief presents a time-to-digital converter (TDC) with a three-level conversion scheme based on a dual delay-locked loop (DLL) structure. The linear-feedback-shift-register counter is implemented for measurement range extension, and a differential delay cell is adopted for time resolution improvement. Furthermore, the DLL is applied to improve the stability of the multiphase clock frequency. The test chip is designed and fabricated in a Taiwan Semiconductor Manufacturing Company 0.35-μm CMOS process. With an input reference clock of 40 MHz, the total 15-bit three-level TDC can realize a 3-μs maximum range and a 476-ps resolution. The differential nonlinearity is less than ±0.65 LSB, and the integral nonlinearity is within -1.35 LSB to +1.4 LSB. © 2004-2012 IEEE.

Wu J.,Wuxi Branch of Southeast University | Ma K.,Wuxi Branch of Southeast University | Nie W.,Jiangnan University | Qu N.,Wuxi Branch of Southeast University
IEICE Electronics Express | Year: 2011

A novel high accuracy fast speed operational transconductance amplifier (OTA) for switched-capacitor filters in 0.35 μm CMOS technology is presented in this paper. The proposed OTA employs nonlinear current mirror and cross-pair structure to enhance the DC, AC and transient performance. Both simulation and experimental results are presented to show the performance boosting of the proposed OTA. Under the condition of 33 μA quiescent current and a 30 pF load capacitance, the experimental results of the DC gain, Gain Bandwidth, positive and negative slew rate have achieved as high as 62.5 dB, 4.9 MHz, 6.3V/μs and 8V/μs, respectively. Both GBW and SR are boosted more than one order compared to the conventional OTA. © IEICE 2011.

Nie W.,Jiangnan University | Nie W.,Wuxi Crystal Source Electronics Co. | Wu J.,Wuxi Branch of Southeast University | Ma X.,Wuxi Crystal Source Electronics Co. | And 2 more authors.
Journal of Semiconductors | Year: 2012

Isolated extended drain NMOS (EDNMOS) transistors are widely used in power signal processing. The hole current induced by a high electric field can result in a serious reliability problem due to a parasitic NPN effect. By optimizing p-type epitaxial (p-epi) thickness, n-type buried layer (BLN) and nwell doping distribution, the peak electric field is decreased by 30% and the peak hole current is decreased by 60%, which obviously suppress the parasitic NPN effect. Measured I-V characteristics and transmission line pulsing (TLP) results show that the on-state breakdown voltage is increased from 28 to 37 V when 6 V V gs is applied and the energy capability is improved by about 30%, while the on-state resistance remains unchanged. © 2012 Chinese Institute of Electronics.

Wu J.,Wuxi Branch of Southeast University | Ke M.,Wuxi Branch of Southeast University | Qu N.,Wuxi Branch of Southeast University | Zhang W.,Wuxi Branch of Southeast University
Analog Integrated Circuits and Signal Processing | Year: 2012

Based on the analysis of the inherent limitations of conventional OTA, this paper introduces a basic strategy by combinating linear-nonlinear adaptive current mirror and local cross-pair to solve the mutual restraint between AC and DC characteristics of the circuit. In order to simplify the multi-mode complicated circuit design, an analytical model for the new OTA is proposed, which is consistent with SPICE simulation results. Under the limitation of the static current consumption, the maximum limit of the circuit performance can be predicted by the proposed model. Under the condition of 29 μA quiescent current and 30 pF load capacitance, a chip is implemented in 0.18 lm CMOS technology, and the test results show that the DC gain, GBW and slew rate achieve 73 dB, 6 MHz and 14 V/lS, respectively, and the optimal performance of DC, AC and transient can be obtained almost simultaneously.

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