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Taichung, Taiwan

Chuang C.-H.,Wire Technology Co. | Lin Y.-C.,National Taiwan University | Lin C.-W.,National Taiwan University
Metals | Year: 2016

The intermetallic compounds formed during the diffusion soldering of a Bi2Te2.55Se0.45 thermoelectric material with a Cu electrode are investigated. For this bonding process, Bi2Te2.55Se0.45 was pre-coated with a 1mm Sn thin film on the thermoelectric element and pre-heated at 250 °C for 3 min before being electroplated with a Ni barrier layer and a Ag reaction layer. The pre-treated thermoelectric element was bonded with a Ag-coated Cu electrode using a 4 mm Sn interlayer at temperatures between 250 and 325 °C. The results indicated that a multi-layer of Bi–Te–Se/Sn–Te–Se–Bi/Ni3Sn4 phases formed at the Bi2Te2.55Se0.45/Ni interface, ensuring sound cohesion between the Bi2Te2.55Se0.45 thermoelectric material and Ni barrier. The molten Sn interlayer reacted rapidly with both Ag reaction layers to form an Ag3Sn intermetallic layer until it was completely exhausted and the Ag/Sn/Ag sandwich transformed into a Ag/Ag3Sn/Ag joint. Satisfactory shear strengths ranging from 19.3 and 21.8 MPa were achieved in Bi2Te2.55Se0.45/Cu joints bonded at 250 to 300 °C for 5 to 30 min, dropping to values of about 11 MPa for 60 min, bonding at 275 and 300 °C. In addition, poor strengths of about 7 MPa resulted from bonding at a higher temperature of 325 °C for 5 to 60 min. © 2016 by the authors; licensee MDPI, Basel, Switzerland.


Patent
Wire Technology Co. | Date: 2013-02-07

A stud bump structure and method for manufacturing the same are provided. The stud bump structure includes a substrate, and a first silver alloy stud bump disposed on the substrate, wherein the first silver alloy stud bump has a weight percentage ratio of Ag:Au:Pd=60-99.98:0.01-30:0.01-10.


A stud bump structure, a package structure thereof and method of manufacturing the package structure are provided. The stud bump structure include a first chip; and a silver alloy stud bump disposed on the substrate, wherein the on-chip silver alloy stud bump includes Pd of 0.0110 wt %, while the balance is Ag. The package structure further includes a substrate having an on-substrate bond pad electrically connected to the on-chip silver alloy stud bump by flip chip bonding.


The invention provides a composite wire for electronic package, the composite wire including an alloy core member and a plating layer forming on a surface of the alloy core member. The alloy core member is silver-palladium alloy. The plating layer is at least one layer of thin film of pure gold, pure palladium or gold-palladium alloy. The invention also provides a method for manufacturing the composite wire. The method includes steps of: (a) providing a wire rod, (b) forming a wire having a predetermined diameter from the wire rod by a plurality of processes including cold working and annealing and (c) forming a plating layer on a surface of the wire rod before step (b) or forming a plating layer on a surface of the wire after step (b) by electroplating, sputtering or vacuum evaporation.


The invention provides a composite wire for electronic package, the composite wire including an alloy core member and a plating layer forming on a surface of the alloy core member. The alloy core member is silver-gold-palladium alloy. The plating layer is at least one layer of thin film of pure gold, pure palladium or gold-palladium alloy. The invention also provides a method for manufacturing the composite wire. The method includes steps of: (a) providing a wire rod, (b) forming a wire having a predetermined diameter from the wire rod by a plurality of processes including cold working and annealing and (c) forming a plating layer on a surface of the wire rod before step (b) or forming a plating layer on a surface of the wire after step (b) by electroplating, sputtering or vacuum evaporation.

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