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Alameda, CA, United States

A non-transitory computer-readable storage medium storing a set of instructions executable by a processor, the set of instructions, when executed by the processor, causing the processor to perform operations including mapping a memory area storing a segment of code for a kernel of the system during an initialization time of a system. The operations also include executing the segment of code during the initialization time. The operations also include unmapping a portion of the memory area for the kernel after the segment of code has been executed.


Patent
Wind River | Date: 2013-02-11

A system includes a memory including a plurality of software applications. The plurality of software applications includes a first software application and a second software application. The system also includes a deterministic group comprising a first processing core. The first processing core executes a first resource monitor and the first software application. The system also includes a constrained group comprising a second processing core. The second processing core executes a second resource monitor and the second software application. The first resource monitor detects an insufficient access to resources by the first software application and sends an indication to the second resource monitor. The second resource monitor receives the indication and instructs the second processing core to modify execution of the second software application.


A non-transitory computer-readable storage medium storing a set of instructions that are executable by a processor. The set of instructions, when executed by one or more processors of a multi-processor computing system, causes the one or more processors to perform operations including initiating a first processor of the multi-processor computing system with an operating system image of an operating system, the operating system image including a predetermined object map, initiating a second processor of the multi-processor computing system with the operating system image, placing a plurality of system objects with corresponding processors according to the predetermined object map, receiving a triggering event causing a change to the predetermined object map and relocating one of the system objects to a different one of the processors based on the change to the predetermined object map.


The exemplary embodiments described herein relate to systems and methods for operating system aware low latency handling. One embodiment relates to a non-transitory computer readable storage medium including a set of instructions executable by a processor, the set of instructions, when executed, resulting in a performance of receiving a fast interrupt request asserted by a hardware device while the processor is executing within a kernel critical section, executing a fast interrupt handler at a first priority level, raising a second priority level interrupt by the fast interrupt handler based on the fast interrupt request, wherein the second priority level interrupt invokes a kernel service and processing the second priority level interrupt once the processor has executed the kernel critical section.


The exemplary embodiments describe systems and methods for utilizing a semaphore with timeout and lock-free path for message passing architectures. One embodiment is related to a method comprising receiving a request from a client to access an object, the object including a plurality of resources, placing the request in a lock-free pend queue of a semaphore, manipulating a count of the semaphore based on an availability of at least one of the plurality of resources, and determining whether the client can use a fast path to the object.

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