Taichung, Taiwan
Taichung, Taiwan

Winbond Electronics Corporation is a Taiwan-based corporation founded in 1987 that produces semiconductors and several types of integrated circuits, most notably Dynamic RAM, Static RAM, microcontrollers, and personal computer ICs. Winbond is currently the largest brand name integrated circuit supplier in Taiwan, and one of the biggest suppliers of semiconductor solutions worldwide. Computer IC, Consumer Electronics IC and Logic Product Foundry of Winbond product lines have been spun off as Nuvoton Technology Corporation on July 1, 2008. Wikipedia.


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Patent
Winbond Electronics | Date: 2017-05-03

Provided are a resistive memory and a method of fabricating the resistive memory. The resistive memory includes a first electrode, a second electrode, a variable resistance layer, an oxygen exchange layer, and a protection layer. The first electrode and the second electrode are arranged opposite to each other. The variable resistance layer is arranged between the first electrode and the second electrode. The oxygen exchange layer is arranged between the variable resistance layer and the second electrode. The protection layer is arranged at least on sidewalls of the oxygen exchange layer.


There is provided a computerized mechanism for vulnerability evaluation in a layout having circuitry units as interceptors, comprising receiving a layout with interceptors incorporated therein at prearranged positions, virtually inducing faults in the layout by modeling a physical phenomenon that affects timings in the layout, detecting timing violations in the layout responsive to the induced faults based on discrepancies between the timings and provided specifications thereof determining vulnerability of the layout to faults according to detected faults, and wherein the method is performed on an at least one computerized apparatus configured to perform the method.


Patent
Winbond Electronics | Date: 2016-11-08

A NADN flash memory and a program method thereof suppressing an influence caused by FG coupling and having a high reliability are provided. The program method of the flash memory of the present invention includes a step of selecting pages of a memory array, a step of applying a programming voltage to even-numbered pages of the selected pages, a step of soft-programming odd-numbered pages of the selected pages and a step of applying the programming voltage to the odd-numbered pages after the programming of the even-numbered pages is completed.


Patent
Winbond Electronics | Date: 2017-05-31

A resistive random-access memory device includes a RRAM array including a plurality of RRAM cells coupled to a source line, a controller, a bit-line decoder, and a sense circuit. Each of the RRAM cells storing a logic state and is selected by the corresponding bit line and word line. The controller selects a selected RRAM cell by a bit-line signal and a selected word line and determines the logic state according to a sense signal. The bit-line decoder couples a data bit line to the selected bit line according to a bit-line signal. The sense circuit is coupled to the data bit line and compares a memory current flowing through the selected RRAM with a reference current to generate the sense signal. The sense circuit sinks the memory current from the data bit line when operating in a reset operation and a reverse read operation. The sense circuit sources the memory current to the data bit line when operating in a set operation and a forward read operation.


Patent
Winbond Electronics | Date: 2016-08-16

A manufacturing method of a semiconductor memory device is provided. The semiconductor memory device can suppress current leakage generated during a programming action so that the programming action can be executed with high reliability. A flash memory of this invention has a memory array in which NAND type strings are formed. Gates of memory cells in row direction of strings are commonly connected to a word line. Gates of bit line select transistors are commonly connected to a select gate line (SGD). Gates of source line select transistors are commonly connected to a select gate line (SGS). An interval (S4) of the select gate line (SGS) and a gate of a word line (WL0) adjacent to the select gate line (SGS) is larger than an interval (S1) of the select gate line (SGD) and a gate of a word line (WL7) adjacent to the select gate line (SGD).


Patent
Winbond Electronics | Date: 2016-01-06

A method for estimating stress of an electronic component. An electronic component including first and second elements and conductive bumps is provided. Each conductive bump has two surfaces connected to the first and second elements respectively. Two adjacent conductive bumps have a pitch therebetween. The conductive bumps includes a first conductive bump and second conductive bumps. A stress value of the first conductive bump related to a testing parameter is calculated. A stress value of each second conductive bump related to the testing parameter is calculated according to a first calculating formula. The first calculating formula is _(2 )is the stress of each second conductive bump, L is a beeline distance between each second conductive bump and the first conductive bump, D is an average value of the pitches of the conductive bumps, r is a radius of each surface, and _(1 )is the stress value of the first conductive bump.


Patent
Winbond Electronics | Date: 2016-06-23

A memory-programming device includes a voltage generator, a resistive random-access memory, a current detector, and a controller. The voltage generator is configured to generate a program voltage. The resistive random-access memory receives the program voltage to generate a program current. The current detector detects the program current. The controller executes a program procedure. The program procedure includes: gradually ramping up the program voltage by the voltage generator and detecting the program current by the current detector; discovering the maximum of the program current to be a reference current; continuing to ramp up the program voltage by the voltage generator and determining whether the program current detected by the current detector is not less than the reference current; controlling the voltage generator to stop generating the program voltage when the program current is not less than the reference current.


A method for repairing of the invention includes steps as follows: storing redundant information including an address of the bad column, identification information for identifying a failure in which one of an even column or an odd column of the bad column and an address of a redundant column of a redundant memory region for repairing the bad column; determining whether a column address of a selected column is consistent with the address of the bad column based on the redundant information; when consistent, converting a column of the bad column having the failure into a column of the redundant column based on the identification information; and not converting another column of the bad column without the failure into another column of the redundant column.


A method, a device and a non-transitory computer-readable medium for cryptographic computation are provided. The method for computation includes: receiving, in a Montgomery multiplier circuit having a predefined block size, a pair of operands A and B and a modulus M for computation of a Montgomery product of A and B mod M; specifying a number n of blocks of the predefined block size to be used in the computation; computing a blinded modulus M as a multiple of the modulus M by a random factor R, M=R*M, while selecting R so that the length of M is less than n times the block size by at least two bits; and operating the Montgomery multiplier circuit to compute and output the Montgomery product of A and B mod M.


In Elliptic Curve Cryptography (ECC), one performs a great number of modular multiplications. These are usually done by Montgomery Multiplication algorithm, which needs the operands to be preprocessed (namely, converted to the Montgomery Domain), which is normally done by an equivalent of a long division. We provide a method to perform this conversion by a single Montgomery multiplication on the raw data. The method is formulated for elliptic curve points represented in Jacobian coordinates but can be extended to other representations.

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