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Camarillo, CA, United States

Vitesse Semiconductor is a fabless American semiconductor company based in Camarillo, California, which develops high-performance Ethernet integrated circuits solutions for Carrier, Enterprise and Internet of Things networks. Wikipedia.


Chang F.,Vitesse Semiconductor | Onohara K.,Osaka University | Mizuochi T.,Osaka University
IEEE Communications Magazine | Year: 2010

The role of forward error correction has become of critical importance in fiber optic communications, as backbone networks increase in speed to 40 and 100 Gb/s, particularly as poor optical-signal-to-noise environments are encountered. Such environments become more commonplace in higher-speed environments, as more optical amplifiers are deployed in networks. Many generations of FEC have been implemented, including block codes and concatenated codes. Developers now have options to consider hard-decision and soft-decision codes. This article describes the advantages of each type in particular transmission environments. © 2010 IEEE.


Patent
Vitesse Semiconductor | Date: 2012-05-14

A system and method for squelching a recovered clock in an Ethernet network. In one embodiment the invention provides a method for squelching a recovered clock in an Ethernet network comprising a local node coupled to a remote node by a link, the method including receiving a descrambler status signal, receiving a remote receiver status signal, receiving a link status signal, and squelching the recovered clock signal based on the descrambler status signal, the remote receiver status signal, and the link status signal.


Patent
Vitesse Semiconductor | Date: 2014-02-03

A slave communication device may transmit a packet to the master communication device, with the packet including a transmission time field and a correction field. The transmission time field may contain a value indicative of an approximate time of transmission of the packet by the slave communication device, and the correction field may contain a value indicative of a difference between the approximate time of transmission and an actual time of transmission of the packet by the slave communication device.


Patent
Vitesse Semiconductor | Date: 2012-09-14

Continuously interleaved codewords are used in a communication system to provide error correction capability. In general, each codeword shares symbols with both preceding and subsequent codewords, when the codewords are arranged in an order, such that correction of symbols in any one codeword also corrects symbols in another codeword and correction of symbols in any codeword may allow, considering possible corrections of intermediate codewords, for further correction of any codeword in the order of codewords. In one embodiment received information may be arranged in subframes, with each subframe including terminal symbols of a plurality of codewords, each of the plurality of codewords including symbols in multiple subframes.


Patent
Vitesse Semiconductor | Date: 2014-09-30

A transparent clock converter is interposed between a non-precision time protocol (non-PTP) enabled network node and other portions of the network. The transparent clock converter effectively converts the non-PTP node into a transparent clock node. In some embodiments the transparent clock converter includes physical layer devices, but not media access controllers.

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