Vishay Intertechnology, Inc. is one of the world's largest manufacturers of discrete semiconductors and passive electronic components. Vishay has manufacturing plants in Israel, Asia, Europe, and the Americas where it produces rectifiers, diodes, MOSFETs, optoelectronics, selected integrated circuits, resistors, capacitors, and inductors. Vishay Intertechnology revenues for 2011 were $2.594 billion. As of December 31, 2011, Vishay Intertechnology had approximately 20,900 full-time employees. Wikipedia.
Vishay | Date: 2016-08-05
An electrical device comprising a ribbed molded body housing an electrical component is provided. The ribbed molded body includes at least one surface or portion having a plurality of ribs along at least a portion of the surface. The electrical component may be a passive or active electrical component. The electrical component may be connected to a lead frame and molded into the ribbed molded body.
Vishay | Date: 2016-06-27
A resistor includes a substantially cylindrical resistive element having a resistance of less than about 1 m, a substantially cylindrical first termination electrically connected to the resistive element and a second termination electrically connected to the resistive element. The substantially cylindrical first termination is hollow to allow for accepting a connection such as from a battery cable. In addition there may be sense leads present on the resistor. A method of forming a substantially cylindrical resistor includes forming a hollow cylindrical resistor body by rolling a flat sheet comprising a resistive element and a first termination and a second termination joined on opposite ends of the resistive element.
Vishay | Date: 2016-04-07
A laterally diffused metal oxide semiconductor (LDMOS) transistor structure with improved unclamped inductive switching immunity. The LDMOS includes a substrate and an adjacent epitaxial layer both of a first conductivity type. A gate structure is above the epitaxial layer. A drain region and a source region, both of a second conductivity type, are within the epitaxial layer. A channel is formed between the source and drain region and arranged below the gate structure. A body structure of the first conductivity type is at least partially formed under the gate structure and extends laterally under the source region, wherein the epitaxial layer is less doped than the body structure. A conductive trench-like feed-through element passes through the epitaxial layer and contacts the substrate and the source region. The LDMOS includes a tub region of the first conductivity type formed under the source region, and adjacent laterally to and in contact with said body structure and said trench-like feed-through element.
Vishay | Date: 2016-06-13
To produce a cost-effective fuse in chip design, which is applied to a carrier substrate made of a Al_(2)O_(3 )ceramic having a high thermal conductivity, and which is provided with a fusible metallic conductor and a cover layer, in which the melting point of the metallic conductor may be defined reliably, it is suggested that an intermediate layer having low thermal conductivity be positioned between the carrier substrate and the metallic conductor, the intermediate layer being formed by a low-melting-point inorganic glass paste applied in the screen-printing method or an organic intermediate layer applied in island printing. Furthermore, a method for manufacturing the fuse is specified.
Vishay | Date: 2016-12-14
A positional encoder comprises a moveable member and at least a first and a second sensor. The moveable member is rotatable relative to the first and second sensors,the first sensor being adapted to capture a first component of a current position of the moveable member and to output a first signal corresponding to the first component, the second sensor being adapted to capture a second component of the current position complementary to the first component and to output a second signal corresponding to the second component, wherein the positional encoder further comprises at least a first memory unit holding a plurality of predetermined look-up values, each predetermined look-up value representing a positional value which corresponds to a respective set of at least the first and second signals and being associated with an individual memory address which is formed by concatenating the signals of the respective set, the first memory unit being configured to receive a memory address which is formed by concatenating at least the first and second signals outputted by the first and second sensors, respectively, and to output the predetermined look-up value associated with the received memory address in response.
Vishay | Date: 2016-07-25
A current sense resistor and a method of manufacturing a current sensing resistor with temperature coefficient of resistance (TCR) compensation are disclosed. The resistor has a resistive strip disposed between two conductive strips. A pair of main terminals and a pair of voltage sense terminals are formed in the conductive strips. A pair of rough TCR calibration slots is located between the main terminals and the voltage sense terminals, each of the rough TCR calibration slots have a depth selected to obtain a negative starting TCR value observed at the voltage sense terminals. A fine TCR calibration slot is formed between the pair of voltage sense terminals.
Vishay | Date: 2016-04-05
A semiconductor device (e.g., a flip chip) includes a substrate layer that is separated from a drain contact by an intervening layer. Trench-like feed-through elements that pass through the intervening layer are used to electrically connect the drain contact and the substrate layer when the device is operated.
Vishay | Date: 2016-08-15
A split gate semiconductor device includes a trench gate having a first electrode region and a second electrode region that are separated from each other by a gate oxide layer and an adjacent dielectric layer. The boundary of the gate oxide layer and the dielectric layer is curved to avoid a sharp corner where the gate oxide layer meets the sidewalls of the trench.
Vishay | Date: 2016-02-01
A metal strip resistor is provided. The metal strip resistor includes a metal strip forming a resistive element and providing support for the metal strip resistor without use of a separate substrate. There are first and second opposite terminations overlaying the metal strip. There is plating on each of the first and second opposite terminations. There is also an insulating material overlaying the metal strip between the first and second opposite terminations. A method for forming a metal strip resistor wherein a metal strip provides support for the metal strip resistor without use of a separate substrate is provided. The method includes coating an insulative material to the metal strip, applying a lithographic process to form a conductive pattern overlaying the resistive material wherein the conductive pattern includes first and second opposite terminations, electroplating the conductive pattern, and adjusting resistance of the metal strip.
Vishay | Date: 2016-01-05
Systems and methods for substrate wafer back side and edge cross section seals. In accordance with a first method embodiment, a silicon wafer of a first conductivity type is accessed. An epitaxial layer of the first conductivity type is grown on a front surface of the silicon wafer. The epitaxial layer is implanted to form a region of an opposite conductivity type. The growing and implanting are repeated to form a vertical column of the opposite conductivity type. The wafer may also be implanted to form a region of the opposite conductivity type vertically aligned with the vertical column.