Malvern, PA, United States
Malvern, PA, United States

Vishay Intertechnology, Inc. is one of the world's largest manufacturers of discrete semiconductors and passive electronic components. Vishay has manufacturing plants in Israel, Asia, Europe, and the Americas where it produces rectifiers, diodes, MOSFETs, optoelectronics, selected integrated circuits, resistors, capacitors, and inductors. Vishay Intertechnology revenues for 2011 were $2.594 billion. As of December 31, 2011, Vishay Intertechnology had approximately 20,900 full-time employees. Wikipedia.


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An electrical device comprising a ribbed molded body housing an electrical component is provided. The ribbed molded body includes at least one surface or portion having a plurality of ribs along at least a portion of the surface. The electrical component may be a passive or active electrical component. The electrical component may be connected to a lead frame and molded into the ribbed molded body.


Patent
Vishay | Date: 2016-06-27

A resistor includes a substantially cylindrical resistive element having a resistance of less than about 1 m, a substantially cylindrical first termination electrically connected to the resistive element and a second termination electrically connected to the resistive element. The substantially cylindrical first termination is hollow to allow for accepting a connection such as from a battery cable. In addition there may be sense leads present on the resistor. A method of forming a substantially cylindrical resistor includes forming a hollow cylindrical resistor body by rolling a flat sheet comprising a resistive element and a first termination and a second termination joined on opposite ends of the resistive element.


First polysilicon (poly-1) is deposited into deep trenches that have been formed in a substrate. A first polysilicon polishing process is performed to planarize the exposed surfaces of the poly-1 so that the surfaces are flush with adjacent surfaces. Then, shallow trenches are formed in the substrate between the deep trenches, and second polysilicon (poly-2) is deposited into the shallow trenches. A second polysilicon polishing process is performed to planarize the exposed surface of the poly-2 so that the surface is flush with adjacent surfaces. Metal contacts to the poly-1 and the poly-2 are then formed.


Trench MOSFET with self-aligned body contact with spacer. In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor substrate, and at least two gate trenches formed in the semiconductor substrate. Each of the trenches comprises a gate electrode. The semiconductor device also includes a body contact trench formed in the semiconductor substrate between the gate trenches. The body contact trench has a lower width at the bottom of the body contact trench and an ohmic body contact implant beneath the body contact trench. The horizontal extent of the ohmic body contact implant is at least the lower width of the body contact trench.


A method for fabricating a MOSFET having an active area and an edge termination area is disclosed. The method includes forming a first plurality of implants at the bottom of trenches located in the active area and in the edge termination area. A second plurality of implants is formed at the bottom of the trenches located in the active area. The second plurality of implants formed at the bottom of the trenches located in the active area causes the implants formed at the bottom of the trenches located in the active area to reach a predetermined concentration. In so doing, the breakdown voltage of both the active and edge termination areas can be made similar and thereby optimized while maintaining advantageous RDson.


Patent
Vishay | Date: 2017-02-22

In one embodiment, a method can include coupling a gate and a source of a first die to a lead frame. The first die can include the gate and the source that are located on a first surface of the first die and a drain that is located on a second surface of the first die that is opposite the first surface. In addition, the method can include coupling a source of a second die to the drain of the first die. The second die can include a gate and the source that are located on a first surface of the second die and a drain that is located on a second surface of the second die that is opposite the first surface.


Patent
Vishay | Date: 2017-06-28

Vertical sense devices in vertical trench MOSFET. In accordance with an embodiment of the present invention, an electronic circuit includes a vertical trench metal oxide semiconductor field effect transistor configured for switching currents of at least one amp and a current sensing field effect transistor configured to provide an indication of drain to source current of the MOSFET. A current sense ratio of the current sensing FET is at least 15 thousand and may be greater than 29 thousand.


Edge termination for super-junction MOSFETs. In accordance with an embodiment of the present invention, a super-junction metal oxide semiconductor field effect transistor (MOSFET) includes a core super-junction region including a plurality of parallel core plates coupled to a source terminal of the super-junction MOSFET. The super-junction MOSFET also includes a termination region surrounding the core super-junction region comprising a plurality of separated floating termination segments configured to force breakdown into the core super-junction region and not in the termination region. Each termination segment has a length dimension less than a length dimension of the core plates.


Patent
Vishay | Date: 2016-01-14

A low profile wet electrolytic capacitor is disclosed. The low profile wet electrolytic capacitor includes an outer case assembly. The outer case assembly is formed by an outer case and outer case cover that is hermetically sealed to the outer case. The outer case assembly includes an interior area. A capacitive element is positioned in the interior area. The capacitive element is isolated from the outer case assembly by a plurality of insulative elements. A connecting tube is positioned perpendicular to and attached to the outer case and the outer case cover and passes through an opening in the capacitive element. An isolated positive lead is positioned on the outer case assembly and is in electrical communication with the capacitive element. A fluid electrolyte is contained in the interior area of the outer case assembly. A method of forming the capacitor and stacked capacitor assemblies is also provided.


A metal insulator semiconductor field effect transistor (MISFET) such as a super junction metal oxide semiconductor FET with high voltage breakdown is realized by, in essence, stacking a relatively low aspect ratio column (trenches filled with dopant, e.g., p-type dopant) on top of a volume or volumes formed by implanting the dopant in lower layers. Together, the low aspect ratio column and the volume(s) form a continuous high aspect ratio column.

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