Entity

Time filter

Source Type

Taipei, Taiwan

VIA Technologies Inc. is a Taiwanese manufacturer of integrated circuits, mainly motherboard chipsets, CPUs, and memory, and is part of the Formosa Plastics Group. It is the world's largest independent manufacturer of motherboard chipsets. As a fabless semiconductor company, VIA conducts research and development of its chipsets in-house, then subcontracts the actual manufacturing to third-party merchant foundries, such as TSMC. Wikipedia.


Shie M.-C.,National Taiwan University of Science and Technology | Dian S.D.,VIA Technologies
Proceedings of the International Conference on Anti-Counterfeiting, Security and Identification, ASID | Year: 2012

The integrity analysis of the PCB signal has already become important due to the use of high-speed clock, high-speed signal transmitter, high definition and high-speed spare part. In the high speed board/package design, designers are trying to improve or minimize all the impedance mismatches along the high speed signal path. Impedance discontinuities on PCB board will cause signal reflections, degrade the high-speed signal slew rate and eye height. In this paper, signal integrity of differential signal improvement analysis method is proposed. We analyze the correlation of channel width, spacing, and impedance. Then we observe that can increase the odd mode effect by decreasing the spacing. By the way, we not only can enhance the slew rate performance, but can also save more area of routing. © 2012 IEEE.


Jiang I.H.-R.,National Chiao Tung University | Chang H.-Y.,National Taiwan University | Chang H.-Y.,VIA Technologies | Chang C.-L.,National Chiao Tung University
IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Year: 2012

Due to excessive current densities, electromigration (EM) may trigger a permanent open- or short-circuit failure in signal wires or power networks in analog or mixed-signal circuits. As the feature size keeps shrinking, this effect becomes a key reliability concern. Hence, in this paper, we focus on wiring topology generation for avoiding EM at the routing stage. Prior works tended towards heuristics; on the contrary, we first claim this problem belongs to class P instead of class NP-hard. Our breakthrough is, via the proof of the greedy-choice property, we successfully model this problem on a multi-source multi-sink flow network and then solve it by a strongly polynomial time algorithm. Experimental results prove the effectiveness and efficiency of our algorithm. © 2006 IEEE.


Lee P.-J.,National Chi Nan University | Lin H.-J.,VIA Technologies | Kuo K.-T.,National Chi Nan University
IET Signal Processing | Year: 2014

Multi-view video coding with a hierarchical B picture structure utilises intra-view and inter-view predictions to reduce the quantity of redundant information. The optimal coding mode is determined by exhaustively searching through all possible partition modes; however, a high degree of computational complexity is involved in such exhaustive searches. In this study, the authors statistically analyse the coding mode distribution in inter-view and intra-view and propose a fast mode decision algorithm to select the optimal mode in terms of rate-distortion optimisation. The probability density function of the ratedistortion cost and the degree of the homogeneity in motion are set as the multi-threshold in the algorithm to determine the optimal mode for base view coding. For the multi-view coding, the correlation of the modes in neighbouring views with similar regions is utilised to select the coding mode from the inter-view or intra-view predictions. The experimental results show that the encoding time for the base view and the multi-view is reduced by up to 85 and 69%, respectively, and the quality of the reconstructed video is nearly unchanged. © 2014 The Institution of Engineering and Technology.


Lin Y.-S.,National Chi Nan University | Chen C.-Z.,National Chi Nan University | Yang H.-Y.,National Chi Nan University | Yang H.-Y.,VIA Technologies | And 4 more authors.
IEEE Transactions on Microwave Theory and Techniques | Year: 2010

A wideband low-noise amplifier (LNA) based on the current-reused cascade configuration is proposed. The wideband input-impedance matching was achieved by taking advantage of the resistive shuntshunt feedback in conjunction with a parallel LC load to make the input network equivalent to two parallel RLC-branches, i.e., a second-order wideband bandpass filter. Besides, both the inductive series- and shunt-peaking techniques are used for bandwidth extension. Theoretical analysis shows that both the frequency response of input matching and noise figure (NF) can be described by second-order functions with quality factors as parameters. The CMOS ultra-wideband LNA dissipates 10.34-mW power and achieves S11 below -8.6 dB, S22 below -10 dB, S 12 below -26 dB, flat S21 of 12.26 ± 0.63 dB, and flat NF of 4.24 ± 0.5 dB over the 3.110.6-GHz band of interest. Besides, good phase linearity property (group-delay variation is only ±22 ps across the whole band) is also achieved. The analytical, simulated, and measured results agree well with one another. © 2010 IEEE.


Chiu Y.J.,Taiwan Shoufu University | Chen C.S.,Tainan University of Technology | Chang T.W.,VIA Technologies
International Journal of Ad Hoc and Ubiquitous Computing | Year: 2011

In MIMO-OFDM systems, the multipath components whose delays exceed Cyclic Prefix cause Inter-Symbol Interference and Inter-Carrier Interference, which may degrade system performance severely. In this paper, we propose a joint channel estimation and ISI/ICI cancellation scheme in which a limited CP is used in a trade-off against high-rate performance in MIMO-OFDM systems. A channel estimation scheme based on the criterion of Expectation-Maximisation (EM) algorithm can be proposed through the use of a training symbol. Simulation resultsshow that the proposed method can significantly enhance the overall MIMO-OFDM system performance after only afew iterations. © 2011 Inderscience Enterprises Ltd.

Discover hidden collaborations