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Katyara S.,Sukkur Institute of Business Administration | Staszewski L.,AGH University of Science and Technology | Musavi H.A.,Indus University | Soomro F.,Usman Institute of Technology
International Journal of Mechanical Engineering and Robotics Research | Year: 2017

With the emerging issues about the ecological pollution and potential energy deficiency, many efforts are taken to initiate the renewable energy plans, established primarily with wind energy, solar panels and low capacity water power plants etc. These forms of power production are called Distributed Generation (DG), as they are installed near the load centers. Power utilities all over the world are welcoming DGs to increase their generation capacity. With the aim to cut electricity bills, DGs are brought into power networks in order to meet the increased load demands especially during peak hours. It is expected that in the future, more and more DGs will be taken into system. Therefore, with the increased number of DGs, the fault level issue becomes more complex. The interconnection of DG introduces somehow protection problems such as islanding, relay settings and increase of short circuit capacity. In this research, the influence of DG interconnection over the short circuit capacity in the radial distribution network was analyzed and the effective protection scheme for distribution network was proposed then. The effective method for setting the optimal Coordination Time Intervals (CTI) between the transformer and the feeder relays in real distribution systems was also discussed. A protection scheme based on over-current techniques was proposed for synchronous DGs, connected to utility feeder operating in grid-coupled mode, in order to make the most of DG benefits to customers. The proposed solutions were verified with MATLAB software simulations. © 2017 Int. J. Mech. Eng. Rob. Res.


Umair M.,Usman Institute of Technology | Mujeeb-Ur-Rehman,PCSIR Quetta Laboratories | Iqbal A.,University of Balochistan
Case Studies in Engineering Failure Analysis | Year: 2017

This is a case study regarding frequent forced outages in an oil-fired power generating station due to failure of fire resistant fluid (FRF) piping of material ASTM A-304. This analysis was done to find out the most probable cause of failure and to rectify the problem. Methods for finding and analyzing the cracks include nondestructive testing techniques such as visual testing (VT) and dye penetrant testing (PT) along with that periodic monitoring after rectification of problem. The study revealed that pitting and pit to crack transitions were formed in stainless steel piping containing high pressure (system pressure 115 bars) fire resistant fluid. However, after replacement of piping the pitting and cracking reoccurred. It was observed that due to possible exposure to chlorinated moisture in surrounding environment pitting was formed which then transformed into cracks. The research work discussed in this paper illustrates the procedure used in detection of the problem and measures taken to solve the problem. © 2017 The Authors


Ali Z.,PAF KIET | Latif S.,Usman Institute of Technology | Ishaque K.,PAF KIET | Javed S.,PAF KIET | Khan M.G.U.,Usman Institute of Technology
Proceedings of the IASTED International Conference on Modelling and Simulation | Year: 2013

In this paper analysis, design and optimization of the conventional fuzzy logic controller to maintain the load voltage of the buck power converter has been proposed. The CFLC proposed in this paper has two inputs error and the change of error, the rule base used is 2-dimensional linear rule base for the controller. The CFLC response can be optimized by tuning of its input and output scaling gains for this, the concept of analogy between fuzzy controller and its linear counterpart is used. In order to explain the optimization and the effectiveness of the proposed controller a MATLAB simulation is done, the simulation results shows that conventional fuzzy logic controller (CFLC) can be optimized easily when the parameters involved in its linear counterpart are present.


Shakir H.,Bahria University | Ahsan S.T.,Usman Institute of Technology | Faisal N.,Bahria University
IST 2015 - 2015 IEEE International Conference on Imaging Systems and Techniques, Proceedings | Year: 2015

In this research paper, authors propose multimodal brain image registration using discrete wavelet transform(DWT) followed by Gaussian pyramids. The reference and target images are decomposed into their LL, LH, HL and LL DWT coefficients and then are processed for image registration using Gaussian pyramids. The image registration is also done using Gaussian pyramids only and wavelets transforms only for comparison. The quality of registration is measured by comparing the maximum MI values used by the three methods and also by comparing their correlation coefficients. Our proposed technique proves to show better results when compared with the other two methods. © 2015 IEEE.


Ismail M.A.,NED University of Engineering and Technology | Altaf T.,NED University of Engineering and Technology | Mirza S.H.,Usman Institute of Technology
2013 Saudi International Electronics, Communications and Photonics Conference, SIECPC 2013 | Year: 2013

Simulation is a widely accepted tool for evaluating any proposed cache system under different application and configuration scenarios because of the high degree of configurability of cache memory which requires extensive design space exploration and identification of performance bottlenecks in system understudy. In this paper we have presented a new multi-level cache Simulator, 'MCSMC' (Multi-level Cache Simulator for Multi-Cores), developed for multi-core processors at NED University. It is a parallel trace-driven multi-level cache simulator based on module and layers approach. The developed simulator has been tested for upto 2048 cores and 10 cache levels with different cache performance parameters. It is coded in Visual C++ using OpenMP and Win32 process / thread libraries © 2013 IEEE.


Qadir A.,Usman Institute of Technology | Ali A.,NED University of Engineering and Technology
Advanced Materials Research | Year: 2014

This paper describes a current mode filter using two current feedback amplifiers (CFA's). One CFA is used to simulate a negative resistor. The proposed circuit is very useful for low as well as high frequency applications. Circuit is simple and canonic. The use of grounded capacitors in the design make it suitable for implementation in CMOS technology. © (2014) Trans Tech Publications, Switzerland.


Qadir A.,Usman Institute of Technology | Ali A.,NED University of Engineering and Technology
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2013

In linear system theory impulse response of any system is of great significance. It is the impulse response which is helpful in determining the convolution in continuous time system (unit sample response in Digital Signal Processing). The impulse response of simple systems can be calculated from the system differential equation or from the transfer function of the system (by taking the inverse Fourier Transform of transfer function). To the best of author's knowledge there exists no such scheme in the literature so far showing any practical method that can demonstrate the impulse response of a system on the oscilloscope. In this paper the method of demonstrating the impulse response of any linear system to the undergraduate students is presented. The approach is simple and is developed with minimum component count. © 2013 SPIE.


Akbar M.A.,National University of Computer and Emerging Sciences | Qadir A.,Usman Institute of Technology
Procedia Engineering | Year: 2012

Today, the autonomous robots are widely used to perform task in a wide variety of application. A number of research works has been carried out to examine and remove problems faced by the current robotic world. The theme of this paper is to discuss different design consideration along with their limitations and solutions for an autonomous robot which will be able to climb and cross the ramp and place boxes on to stands placed at different points of arena using line following principle. The implementation of this robot was the theme of "NERC 2010". The robot has also the limitation of weight, size and power. © 2012 Published by Elsevier Ltd.


Lohana P.,Usman Institute of Technology
IEEE Engineering Management Review | Year: 2015

MANY young engineers, ready to begin their professional career, need to demonstrate professionalism that goes beyond changing their attire or carrying a briefcase, but instead conducting themselves with a professional attitude i.e., their communication and interpersonal skills in pursuing their technical activities. © 1973-2011 IEEE.


Khatoon H.,NED UET | Hafeez S.,Usman Institute of Technology | Altaf M.T.,NED UET
Proceedings - 2011 9th International Conference on Frontiers of Information Technology, FIT 2011 | Year: 2011

Operating system plays a major role in effective memory management and has a significant impact on the performance of applications. In a Chip Multiprocessor, the onchip memory hierarchy is an important resource that plays a significant role in determining the overall performance of an application. In addition to a number of hardware optimization techniques that work for all types of applications, some software controlled optimization techniques are also effective for improving the performance of on-chip memory hierarchy. This is so because the software controlled techniques generally have a global view of other concurrently running workloads. A better solution to the memory performance problem is to couple the operating system policies and mechanisms to the hardware techniques for management of on-chip memory hierarchy and its optimizations. This paper gives an overview of all such designs that have coupled the on-chip cache optimization techniques with the operating system mechanisms and policies. More techniques are suggested that would be investigated to predict their effectiveness. © 2011 IEEE.

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