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Karachi, Pakistan

Akbar M.A.,National University of Computer and Emerging Sciences | Qadir A.,Usman Institute of Technology
Procedia Engineering

Today, the autonomous robots are widely used to perform task in a wide variety of application. A number of research works has been carried out to examine and remove problems faced by the current robotic world. The theme of this paper is to discuss different design consideration along with their limitations and solutions for an autonomous robot which will be able to climb and cross the ramp and place boxes on to stands placed at different points of arena using line following principle. The implementation of this robot was the theme of "NERC 2010". The robot has also the limitation of weight, size and power. © 2012 Published by Elsevier Ltd. Source

Shakir H.,Bahria University | Ahsan S.T.,Usman Institute of Technology | Faisal N.,Bahria University
IST 2015 - 2015 IEEE International Conference on Imaging Systems and Techniques, Proceedings

In this research paper, authors propose multimodal brain image registration using discrete wavelet transform(DWT) followed by Gaussian pyramids. The reference and target images are decomposed into their LL, LH, HL and LL DWT coefficients and then are processed for image registration using Gaussian pyramids. The image registration is also done using Gaussian pyramids only and wavelets transforms only for comparison. The quality of registration is measured by comparing the maximum MI values used by the three methods and also by comparing their correlation coefficients. Our proposed technique proves to show better results when compared with the other two methods. © 2015 IEEE. Source

Ismail M.A.,NED University of Engineering and Technology | Altaf T.,NED University of Engineering and Technology | Mirza S.H.,Usman Institute of Technology
2013 Saudi International Electronics, Communications and Photonics Conference, SIECPC 2013

Simulation is a widely accepted tool for evaluating any proposed cache system under different application and configuration scenarios because of the high degree of configurability of cache memory which requires extensive design space exploration and identification of performance bottlenecks in system understudy. In this paper we have presented a new multi-level cache Simulator, 'MCSMC' (Multi-level Cache Simulator for Multi-Cores), developed for multi-core processors at NED University. It is a parallel trace-driven multi-level cache simulator based on module and layers approach. The developed simulator has been tested for upto 2048 cores and 10 cache levels with different cache performance parameters. It is coded in Visual C++ using OpenMP and Win32 process / thread libraries © 2013 IEEE. Source

Zaidi F.,City College of New York | Zaidi F.,Karachi Institute of Economics & Technology | Pasta M.Q.,Karachi Institute of Economics & Technology | Pasta M.Q.,Usman Institute of Technology | And 3 more authors.
Social Network Analysis and Mining

Many interconnected systems and particularly social interactions can be modeled as networks. These networks often exhibit common properties such as high clustering coefficient, low average path lengths and degree distributions following power-law. Networks having these properties are called small world-scale free networks or simply complex networks. Recent interest in complex networks has catalysed the development of algorithmic models to artificially generate these networks. Often these algorithms introduce network properties in the model regardless of their social interpretation resulting in networks which are statistically similar but structurally different from real world networks. In this paper, we focus on social networks and apply concepts of social ties, homophily and extraversion-introversion to develop a model for social networks with small world and scale free properties. We claim that the proposed model produces networks which are structurally similar to real world social networks. © 2015, Springer-Verlag Wien. Source

Qadir A.,Usman Institute of Technology | Ali A.,NED University of Engineering and Technology
Advanced Materials Research

This paper describes a current mode filter using two current feedback amplifiers (CFA's). One CFA is used to simulate a negative resistor. The proposed circuit is very useful for low as well as high frequency applications. Circuit is simple and canonic. The use of grounded capacitors in the design make it suitable for implementation in CMOS technology. © (2014) Trans Tech Publications, Switzerland. Source

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