University of Electronic Science and Technology of China

www.uestc.edu.cn
Chengdu, China

The University of Electronic Science and Technology of China is a research-intensive university in Chengdu, China. Wikipedia.


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Patent
University of Electronic Science and Technology of China | Date: 2016-12-07

The present invention relates to a serpentine film heater for adjusting temperature uniformity and a method of temperature adjusting, including a substrate and a serpentine film heating wire which is deposited on the substrate, wherein the serpentine film heating wire is formed by several parallel heating sections and connecting lines. In the longitudinal direction, the temperature uniformity is improved by adjusting the spacings between adjacent heating sections or line widths of the heating sections separately or in combination. In the transverse direction, the every heating section is adjusted to a shape which is wide in center and narrow at two ends. By adjusting the spacings and line widths in both transverse and longitudinal directions the present invention reduces heating power in the central part of the substrate and increases the heating power on the edges, thus compensates the heat transfer difference between center and edges and improves the temperature uniformity.


Patent
University of Electronic Science, Technology of China and Institute Of Electronic And Information Engineering In Dongguan | Date: 2016-12-07

A bidirectional Metal-Oxide-Semiconductor (MOS) device, including a P-type substrate, and an active region. The active region includes a drift region, a first MOS structure and a second MOS structure; the first MOS structure includes a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure includes a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; and the drift region includes a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region. The active region is disposed on the upper surface of the P-type substrate. The first MOS structure and the second MOS structure are symmetrically disposed on two ends of the upper layer of the drift region.


News Article | May 16, 2017
Site: www.sciencedaily.com

Tensile mechanical stress can have a useful effect for some transistors, where the resulting atomic strain allows its current-carrying electron-hole pairs better mobility. However, when that stress is applied to the whole device, as is a popular approach via use of what's called contact etching stop layers (CESLs), the drift region adjacent to the stretched channel is compressed and results in reduced performance. A research team in China have developed a new CESL method that introduces tensile stress into both the channel and the drift region, improving overall performance by offering low drift resistance, high cut-off frequency and desirable breakdown characteristics. Their work is described in an article appearing this week in the journal AIP Advances, from AIP Publishing. The team of researchers became interested in the method because of work done on strained silicon techniques. During research on strained meta-oxide semiconductor field effect transistors (MOSFETs), researchers saw that the stress in the source/drain region was inverse to the channel region stress. Based on these observations, they began to study how they might use this phenomenon in a way that could enhance performance. This new research focused on partial silicon-on-insulator (PSOI) devices that introduce tensile stress into both the channel and the drift region using the CESLs. Simulation results also showed that the PSOI device offers better frequency performance and driving capability than unstrained devices. "The most difficult thing for us was to find a low cost, CMOS-compatible method for applying mechanical stress," said Xiangzhan Wang, from the University of Electronic Science and Technology of China. "During the manufacturing process, the wafer bends as the stress film (Si3N4) grows, which creates a problem in holding the wafer in process equipment." The experiment results, however, increased confidence that the new strain technique could not only be applied to small devices, but also to rather large devices to yield performance improvement. With the results, even the research team was surprised at the level of improvement it provided to their simulations. "In our simulation, the fully tensile strained PSOI n-type LDMOSFET showed a 20-30 percent driving current improvement over normal Si LDMOSFET," Wang said. "But when we used this strain method with a commercial Si LDMOS product, the driving current doubled yielding a current increase of more than 100 percent, which was quite surprising for us." While this work has contributed to understanding of the strained Si mechanisms, there is still more to improve and understand. "The next research directions for the team are to optimize the fabrication process for these devices in order to obtain better stability and to try applying the same method to a nonsymmetrical device such as a tunnel FET," Wang said.


News Article | May 16, 2017
Site: phys.org

Tensile mechanical stress can have a useful effect for some transistors, where the resulting atomic strain allows its current-carrying electron-hole pairs better mobility. However, when that stress is applied to the whole device, as is a popular approach via use of what's called contact etching stop layers (CESLs), the drift region adjacent to the stretched channel is compressed and results in reduced performance. A research team in China have developed a new CESL method that introduces tensile stress into both the channel and the drift region, improving overall performance by offering low drift resistance, high cut-off frequency and desirable breakdown characteristics. Their work is described in an article appearing this week in the journal AIP Advances. The team of researchers became interested in the method because of work done on strained silicon techniques. During research on strained meta-oxide semiconductor field effect transistors (MOSFETs), researchers saw that the stress in the source/drain region was inverse to the channel region stress. Based on these observations, they began to study how they might use this phenomenon in a way that could enhance performance. This new research focused on partial silicon-on-insulator (PSOI) devices that introduce tensile stress into both the channel and the drift region using the CESLs. Simulation results also showed that the PSOI device offers better frequency performance and driving capability than unstrained devices. "The most difficult thing for us was to find a low cost, CMOS-compatible method for applying mechanical stress," said Xiangzhan Wang, from the University of Electronic Science and Technology of China. "During the manufacturing process, the wafer bends as the stress film (Si3N4) grows, which creates a problem in holding the wafer in process equipment." The experiment results, however, increased confidence that the new strain technique could not only be applied to small devices, but also to rather large devices to yield performance improvement. With the results, even the research team was surprised at the level of improvement it provided to their simulations. "In our simulation, the fully tensile strained PSOI n-type LDMOSFET showed a 20-30 percent driving current improvement over normal Si LDMOSFET," Wang said. "But when we used this strain method with a commercial Si LDMOS product, the driving current doubled yielding a current increase of more than 100 percent, which was quite surprising for us." While this work has contributed to understanding of the strained Si mechanisms, there is still more to improve and understand. "The next research directions for the team are to optimize the fabrication process for these devices in order to obtain better stability and to try applying the same method to a nonsymmetrical device such as a tunnel FET," Wang said. More information: "Fully tensile strained partial silicon-on-insulator n-type lateral-double-diffused metal-oxide-semiconductor field effect transistor using localized contact etching stop layers," Xiangzhan Wang, Changgui Tan, Xi Zou, Yi Zhang, Jianhua Pan, and Yang Liu. AIP Advances, May 16, 2017 DOI: 10.1063/1.4983214


News Article | May 16, 2017
Site: www.eurekalert.org

WASHINGTON, D.C., May 16, 2017 -- Tensile mechanical stress can have a useful effect for some transistors, where the resulting atomic strain allows its current-carrying electron-hole pairs better mobility. However, when that stress is applied to the whole device, as is a popular approach via use of what's called contact etching stop layers (CESLs), the drift region adjacent to the stretched channel is compressed and results in reduced performance. A research team in China have developed a new CESL method that introduces tensile stress into both the channel and the drift region, improving overall performance by offering low drift resistance, high cut-off frequency and desirable breakdown characteristics. Their work is described in an article appearing this week in the journal AIP Advances, from AIP Publishing. The team of researchers became interested in the method because of work done on strained silicon techniques. During research on strained meta-oxide semiconductor field effect transistors (MOSFETs), researchers saw that the stress in the source/drain region was inverse to the channel region stress. Based on these observations, they began to study how they might use this phenomenon in a way that could enhance performance. This new research focused on partial silicon-on-insulator (PSOI) devices that introduce tensile stress into both the channel and the drift region using the CESLs. Simulation results also showed that the PSOI device offers better frequency performance and driving capability than unstrained devices. "The most difficult thing for us was to find a low cost, CMOS-compatible method for applying mechanical stress," said Xiangzhan Wang, from the University of Electronic Science and Technology of China. "During the manufacturing process, the wafer bends as the stress film (Si3N4) grows, which creates a problem in holding the wafer in process equipment." The experiment results, however, increased confidence that the new strain technique could not only be applied to small devices, but also to rather large devices to yield performance improvement. With the results, even the research team was surprised at the level of improvement it provided to their simulations. "In our simulation, the fully tensile strained PSOI n-type LDMOSFET showed a 20-30 percent driving current improvement over normal Si LDMOSFET," Wang said. "But when we used this strain method with a commercial Si LDMOS product, the driving current doubled yielding a current increase of more than 100 percent, which was quite surprising for us." While this work has contributed to understanding of the strained Si mechanisms, there is still more to improve and understand. "The next research directions for the team are to optimize the fabrication process for these devices in order to obtain better stability and to try applying the same method to a nonsymmetrical device such as a tunnel FET," Wang said. The article, "Fully tensile strained partial silicon-on-insulator n-type lateral-double-diffused metal-oxide-semiconductor field effect transistor using localized contact etching stop layers," is authored by Xiangzhan Wang, Changgui Tan, Xi Zou, Yi Zhang, Jianhua Pan, and Yang Liu. The article appears in the journal AIP Advances on May 16, 2017 [DOI: 10.1063/1.4983214]. It can be accessed at: http://aip. AIP Advances is a fully open access, online-only, peer-reviewed journal. It covers all areas of applied physical sciences. With its advanced web 2.0 functionality, the journal puts relevant content and discussion tools in the hands of the community to shape the direction of the physical sciences. See: http://aipadvances. .


Patent
University of Electronic Science and Technology of China | Date: 2015-06-26

The present invention discloses an unconditional secure communication method based on beam-forming and security code, which comprises the following steps of: Legitimate users send to the signal pie-encoded and modulated, meanwhile eavesdropper receives signals and calculates the bit error rate; computing security coding parameters, legitimate received users send pilot sequence, and legitimate sending users estimate legitimate channel, and extract information on legal channel coding and modulating signal was SVD pre-coding and sending; the signal was decoded, that will be judgment and demodulation then the signal after decoding do security code is transmitted to message or tapping, due to lack of legal channel information, eavesdropper cannot lift pre-coding processing of the received signal with the high bit error rate. This method can establish advantages channel of the wiretap model channel and to ensure that legitimate users can receive signals at the lower bit error rate.


Patent
University of Electronic Science and Technology of China | Date: 2016-11-22

The present invention discloses a method for identifying air pollution sources based on aerosol retrieval and a glowworm swarm algorithm. The method include the steps of: retrieving an AOD value from a satellite remote sensing image, and obtaining a wind speed vector of a corresponding region, gridding the satellite remote sensing image and a digital map of the corresponding region, to obtain an average AOD value of each image block and coordinates of an image block corresponding to the enterprise; taking the coordinates of each image block as an initial location of the glowworm in the GSO algorithm, taking the average AOD value as an attribute of the glowworm, when updating the location of the glowworm each time, introducing a glowworm similarity correction factor obtained from the attribute value and a wind speed and wind direction correction factor obtained from the wind speed vector, to obtain a source location of the glowworm after several iterations; calculating a radius of a pollution coverage area of the enterprise, taking the enterprise as the enterprise producing pollutants corresponding to the glowworms in the pollution coverage area thereof, thereby identifying the pollution sources. The present invention can effectively and accurately identify air pollution sources.


Wang W.-Q.,University of Electronic Science and Technology of China
IEEE Transactions on Geoscience and Remote Sensing | Year: 2011

Multiple-input and multiple-output (MIMO) radar has received renewed attention in recent years, but little work on MIMO synthetic aperture radar (SAR) remote sensing has been reported. This paper presents a scheme of space-time coding MIMO orthogonal frequency division multiplexing (OFDM) SAR for high-resolution imaging. This system employs MIMO configuration in the elevation direction and the Alamouti space-time coding scheme in the azimuth direction, along with the use of OFDM waveform diversity and displaced phase center antenna (DPCA) techniques. As an orthogonal transmission waveform is required for this novel space-time coding MIMO-OFDM SAR system, one kind of OFDM linearly frequency modulated waveforms is investigated. The matched filtering and multibeam forming in the elevation direction are detailed. Additionally, the corresponding mathematical relations and signal models for high-resolution imaging are formed. In this way, efficient spatial diversity gain and improved range resolution are obtained by the MIMO configuration, and the requirement of pulse repeated frequency for wide-swath remote sensing is reduced by the DPCA technique. The feasibility is validated by numerical simulation results. © 2011 IEEE.


Patent
Huawei, University of Electronic Science and Technology of China | Date: 2016-10-03

Embodiments of the present invention provide a pointing interaction method, apparatus, and system. The method includes: obtaining a hand image and an arm image; determining spatial coordinates of a fingertip according to the hand image, and determining spatial coordinates of an arm key portion according to the arm image; and performing converged calculation on the spatial coordinates of the fingertip and the spatial coordinates of the arm key portion, to determine two-dimensional coordinates, on a display screen, of an intersection point between fingertip pointing and the display screen. Therefore, the pointing interaction apparatus can implement high-precision pointing only by using the spatial coordinates of the fingertip and the spatial coordinates of the arm key portion, and the pointing has good realtimeness.


Patent
University of Electronic Science and Technology of China | Date: 2016-05-04

A method for measuring waveform capture rate (WRC) of DSO based on average dead time measurement. First generating ramp signal or symmetric triangular wave signal as base signal, a trigger signal, the frequency which is higher than the nominal maximum waveform capture rate of the DSO under measurement; secondly, setting the parameters of DSO for measuring; then obtaining a plurality of test signals by delaying base signal K times with different delay time, for each test signal, inputting it the trigger signal simultaneously to DSO, calculating dead time between two adjacent captured waveforms according to their initial voltages, finally calculating waveform capture rate based on average dead times. The waveform capture rate obtained can effectively reflect the overall capturing capacity of DSO, more tellingly, the waveform capturing capacity of acquisition system of DSO.

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