United Monolithic Semiconductors GmbH

Neu-Ulm, Germany

United Monolithic Semiconductors GmbH

Neu-Ulm, Germany
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Huber F.,University of Ulm | Riegert S.,University of Ulm | Madel M.,University of Ulm | Madel M.,United Monolithic Semiconductors GmbH | Thonke K.,University of Ulm
Sensors and Actuators, B: Chemical | Year: 2017

In this work, we investigate the hydrogen sulfide (H2S)-gas-sensing-properties of zinc oxide (ZnO) nanowires. By a common chemical vapour deposition (CVD) process ZnO nanowires were grown on silicon (111) using a mixture of ZnO and graphite powder as source material. Subsequently, the nanowires were separated from the substrate and placed on a metal contact structure using dielectrophoresis. The sensing properties of the nanowires were tested in a temperature stabilized setup. Applying a constant voltage and exposing to H2S leads to an increase of the current through the nanowires. Especially the role of oxygen in the sensing mechanism has been investigated using different gases for flushing. We demonstrate that oxygen is crucial for the reset of the sensor and multiple sensing cycles with one sensor were realized. The ZnO nanowires show a very high sensitivity and a H2S concentration of only 50 ppb can be detected. © 2016 Elsevier B.V.

Brazzini T.,University of Bristol | Casbon M.A.,University of Cardiff | Uren M.J.,University of Bristol | Tasker P.J.,University of Cardiff | And 3 more authors.
IEEE Transactions on Electron Devices | Year: 2017

Electroluminescence microscopy and spectroscopy are used to compare the average hot-electron concentration and temperature under radio frequency (RF) operation class A, class B, and class F modes. From the results obtained, class A results, on average, in the highest hot-electron concentration, while class F is the mode with the lowest concentration due to its 'L'-shaped load line. The electron temperature extracted from the electroluminescence spectra is reduced with increasing RF power, reflecting the dominance of electroluminescence from the portion of the load line in the semi-on region. The electroluminescence method is not able to give substantial information on the portion of the load line with high field and low current density which will be responsible for the potentially damaging hottest electrons present in the channel. © 1963-2012 IEEE.

Agency: European Commission | Branch: FP7 | Program: CP | Phase: SPA.2009.2.2.01 | Award Amount: 3.37M | Year: 2010

This proposal is focused on the development of a new generation of wide band gap (WBG) GaN technology and devices for which strong impacts in term of performances, reliability and robustness are expected. AL-IN-WON will explore two main disrupting routes: - Next generation of WBG device based on new epi material (InAlN/GaN) for strong improvement in term of performances and reliability. - High efficiency / High Power generation in Ku / Ka bands It proposes to evaluate in 2 phases next generation of WBG material up to Ka Band. The InAlN/GaN heterostructure offers the following advantages: As InAlN/GaN is lattice matched, it offer the possibility to growth very thin layer in the range of 10nm or below WHICH IS THE MOST RELEVANT to overcome short channel effect AND GO TOWARDS HIGH frequency range up to millimeter wave range. In0.18 Al0.82N /GaN is a new heterostructure able to give twice the drain current available from a more conventional AlGaN/GaN heterostructure. Breakdown voltage is comparable for the two heterostructures. In0.18 Al0.82N is latticed matched to GaN and higher reliability is therefore expected compared to AlGaN/GaN. Passivation is currently a major limitation to device operation. InAlN/GaN MOSHEMT are very promising with strong current drain improvement compared to HEMT (UltraGaN). We plan to evaluate CW Ku and Ka Band MMIC High Power Amplifiers (HPA) and Low Noise Amplifiers (LNA). Demonstrators in Ka band will be designed based on devices coming from the run 2. The final objective being the evaluation of InAlN/GaN compared to more conventional AlGaN/GaN very high power HEMT technology with very high breakdown voltage, high current and compliant with high power density. Regarding space application for which reliability and robustness are of major concerns, we expect to demonstrate the major breakthrough offered by GaN technology, and especially InAlN if successful.

Agency: European Commission | Branch: FP7 | Program: CP | Phase: SPA.2009.2.2.01 | Award Amount: 3.28M | Year: 2010

The project High Quality European GaN-Wafer on SiC Substrates for Space Applications (EuSiC) is aiming at establishing an independent, purely European sustainable supply chain for Gallium Nitride (GaN) based space technologies. The project will significantly reduce the dependence on critical technologies and capabilities from outside Europe for future space applications. An independent supply chain has to include countries of the European Community (EC): a supplier of high-quality semi-insulating Silicon Carbide (SiC) substrates, qualified sources to perform GaN epitaxial layers and as well manufacturers with leading knowledge in GaN device technology required e.g. for Monolithic Microwave Integrated Circuits (MMICs). At present, the missing link in this chain is a reliable source for high-quality 3 inch semi-insulating SiC substrates in Europe. The intention of this project is to improve the quality of semi-insulating SiC-substrates at SiCrystal AG, the leading manufacturer of SiC substrates in Europe. The provided substrates shall be analyzed and evaluated by epi-growth specialists IAF, III-V-Lab, and QinetiQ. Finally devices shall be built and verified on the created GaN epi-wafers by UMS. Continuous monitoring and several feedback loops to the quality of the substrates will enable an accelerated development at SiCrystal AG. Also impacts to improvement of the performance of GaN devices are expected. The project will complement activities already undertaken by European Space Agency ESA, who has assembled a consortium of competent partners under the: GaN Reliability Enhancement and Technology Transfer Initiative (GREAT2).

Agency: European Commission | Branch: FP7 | Program: CP | Phase: SPA-2007-2.2-01 | Award Amount: 2.85M | Year: 2008

On the very last months, the Gallium Nitride (GaN) technology has made a remarked breakthrough in the world of the microwave electronics with the announcement of commercially available transistors from 5W to 180W at microwave frequencies. Coming from major transistor industrial vendors from Japon but also from US, it let equipment manufacturers and especially the one from space think that time has come now for a rapid insertion into their systems. Outside the reliability and the European source concerns, these GaN power transistors will roughly increase power density by more than an order of magnitude for large devices (from 0.5 W/mm to 5 W/mm for space applications including deratings). The consequence will then directly impact the packaging technology for which the thermal resistance needs to be importantly reduced if the advantages obtained at die level want to remain at its highest at module and equipment level. To address this critical item for space satellite applications is the aim of the proposed project which is in the ESA roadmap [Ref. ESTEC/AC/418-20, ESA-IPC 2006] for GaN component strategy but not funded by ESA. The ESA funding is being mainly dedicated toward GaN transistor process optimization, reliability and industrialization. In this project, AGAPAC, which stands for Advanced GaN Packaging, we want to establish a space compatible European supply chain for packaging solution of GaN HEMTs and GaN MMICs by 2010. To realize this project objective, we have defined sub-objectives which directly relate to 7 workpackages targeting: This project will extend beyond state of the art for high thermal dissipation composite (up to 600 W/mK) either based onto diamond or carbon nano-fiber compatible with hybride micropackage manufacturing technologies. The challenge remains in developing a space compatible power micropackage able to withstand up to 100 W of dissipated power when standard same size micropackage are around 25 W.

Brazzini T.,University of Bristol | Casbon M.A.,University of Cardiff | Sun H.,University of Bristol | Uren M.J.,University of Bristol | And 5 more authors.
Applied Physics Letters | Year: 2015

Hot electrons in AlGaN/GaN high electron mobility transistors are studied during radio frequency (RF) and DC operation by means of electroluminescence (EL) microscopy and spectroscopy. The measured EL intensity is decreased under RF operation compared to DC at the same average current, indicating a lower hot electron density. This is explained by averaging the DC EL intensity over the measured load line used in RF measurements, giving reasonable agreement. In addition, the hot electron temperature is lower by up to 15% under RF compared to DC, again at least partially explainable by the weighted averaging along the specific load line. However, peak electron temperature under RF occurs at high VDS and low IDS where EL is insignificant suggesting that any wear-out differences between RF and DC stress of the devices will depend on the balance between hot-carrier and field driven degradation mechanisms. © 2015 AIP Publishing LLC.

Malmros A.,Chalmers University of Technology | Blanck H.,United Monolithic Semiconductors GmbH | Rorsman N.,Chalmers University of Technology
Semiconductor Science and Technology | Year: 2011

Ta-based ohmic contacts to gallium nitride high electron mobility transistor (GaN HEMT) epitaxial structures were investigated. Two metallization schemes were considered: Ta/Al/Ni(Ta)/Au and Ta/Al/Ta. The latter was superior in terms of lower contact resistance (Rc) and wider process window. The metallizations were applied to two different heterostructures (GaN/Al 0.14Ga0.86N/GaN and Al0.25Ga 0.75N/GaN). The lowest measured Rc was 0.06 and 0.28 Ω mm, respectively. The main advantage of the Ta-based ohmic contacts over conventional Ti-based contacts was the low anneal temperature. The optimum temperature of annealing was found to be 550-575 °C. From optical and scanning electron microscopy, it was clear that excellent surface morphology and edge acuity were obtained at these low temperatures. This facilitates lateral scaling of the GaN HEMT. TEM images were taken of the contact cross sections onto which EDX measurements were performed. The aim was to investigate the microstructure and the contact mechanism. Storage tests at 300 °C for more than 400 h in air ambient showed no deterioration of Rc. © 2011 IOP Publishing Ltd.

The invention relates to an electronic component having a circuit integrated on a semiconductor substrate, and a heat-conducting connection of the substrate by soldering using a carrier serving as a heat sink, wherein the invention proposes depositing a first, thicker Au layer (23) in the conventional back-side metallization of the substrate, thereafter a barrier coating (24), and, as the last layer, a thinner, second Au layer (25), wherein the material of the barrier coating is selected such that the barrier coating prevents the penetration by means of a diffusion barrier of Sn or AuSn from a liquid AuSn phase in the region of the second Au layer into the first Au layer (23) during the soldering process. The layer sequence of the back-side metallization is also deposited in the pass-through openings of the substrate, wherein the surface of the second Au layer comprises a reduced coatablity for the solder material due to the material diffused out of the barrier coating.

United Monolithic Semiconductors Gmbh | Date: 2011-05-12

For an HEMT component, in particular on the basis of GaN, it is proposed, for the purpose of reducing field spikes in the conduction channel, in a partial section of the conduction channel between gate electrode and drain electrode, to set the sheet resistance of the conduction channel such that it is higher than in adjacent regions. Various measures for subsequently increasing the sheet resistance in an area-selective manner are specified.

The invention relates to an electronic component having a GaAs semiconductor substrate (HS), semiconductor components (BE) being implemented on the front side thereof, and the back side thereof having a multilayer backside metallization (RM), wherein an advantageous construction of the layer sequence of the backside metallization is proposed, the backside metallization in particular comprising an Au layer as a bonding layer.

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