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Hsinchu, Taiwan

United Microelectronics Corporation was founded as Taiwan's first semiconductor company in 1980 as a spin-off of the government-sponsored Industrial Technology Research Institute . Wikipedia.


An electrostatic discharge protection structure comprises an isolation layer, a high voltage P-well, an N-well, a P-well, a first doped region of N-type conductivity, a second doped region of P-type conductivity, a third doped region of N-type conductivity, a fourth doped region of P-type conductivity, an anode, and a cathode. The isolation layer is disposed on a substrate. The high voltage P-well is disposed on the isolation layer. The N-well is disposed in the high voltage P-well. The P-well is disposed in the high voltage P-well, and the P-well is separated from the N-well. The first and the second doped regions are disposed in the N-well. The third and the fourth doped regions are disposed in the P-well. The anode is electrically connected to the first doped region and the second doped region, and the cathode is electrically connected to the fourth doped region.


Patent
United Microelectronics | Date: 2015-01-08

A method of forming a pattern is disclosed. At first, a layout pattern is provided to a computer system. The layout pattern includes at least a first strip pattern and at least a second strip pattern, and a width of the second strip pattern is substantially larger than a width of the first strip pattern. Subsequently, the second strip pattern neighboring the first strip pattern is defined as a selected pattern. Then, an assist pattern is formed in the selected pattern, and the assist pattern does not overlap a center line of the selected pattern. The layout pattern and the assist pattern are further outputted through the computer system onto a mask.


Patent
United Microelectronics | Date: 2015-06-25

A Fin-FET and a method of forming the Fin-FET are provided. A substrate is provided, and then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure.


Patent
United Microelectronics | Date: 2015-01-08

The present invention provides a MOS transistor, including a substrate, a gate oxide, a gate, a source/drain region and a silicide layer. The gate oxide is disposed on the substrate and the gate is disposed on the gate oxide. The source/drain region is disposed in the substrate at two sides of the gate. The silicide layer is disposed on the source/drain region, wherein the silicide layer includes a curved bottom surface and a curved top surface, both the curved top surface and the curved bottom surface bend toward the substrate and the curved top surface is sunken from two sides thereof, two ends of the silicide layer point tips raised up over the source/drain region and the silicide layer in the middle is thicker than the silicide layer in the peripheral, thereby forming a crescent structure. The present invention further provides a manufacturing method of the MOS transistor.


Patent
United Microelectronics | Date: 2015-01-28

A semiconductor structure includes a substrate, a gate electrode disposed on the substrate, wherein the gate electrode has a first top surface. Agate dielectric layer is disposed between the substrate and the gate electrode. A silicon carbon nitride spacer surrounds the gate electrode, wherein the silicon carbon nitride spacer has a second top surface not higher than the first top surface. A silicon oxide spacer surrounds the silicon carbon nitride spacer.

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