Hsinchu, Taiwan
Hsinchu, Taiwan

United Microelectronics Corporation was founded as Taiwan's first semiconductor company in 1980 as a spin-off of the government-sponsored Industrial Technology Research Institute . Wikipedia.


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Patent
United Microelectronics | Date: 2016-09-02

A method for fabricating a semiconductor device comprises: Firstly, a semiconductor fin comprising a first sub-fin and a second sub-fin protruding from a surface of a substrate is provided. An isolation structure having an opening extending therein is then provided in the semiconductor fin to electrically isolate the first sub-fin and the second sub-fin. Subsequently, a first dummy structure disposed on the first isolation structure and having at least one metal layer entirely overlapping on the first isolation structure along a long axis of the semiconductor fin is formed, wherein the metal layer laterally conformally extends downwards into the opening and extends upwards beyond the first isolation structure along the long axis of the semiconductor fin, so as to form a stepped structure overlapping on sidewalls and a bottom of the opening, a portion of the first sub-fin and a portion of the second sub-fin.


Patent
United Microelectronics | Date: 2016-09-18

A semiconductor structure includes a stacked metal oxide layer on a substrate, wherein the stacked metal oxide layer includes a first metal oxide layer, a second metal oxide layer, and a third metal oxide layer from top to bottom, and the energy bandgap of the second metal oxide layer is lower than the energy bandgap of the first metal oxide layer and that of the third metal oxide layer. The semiconductor structure includes a metal oxide layer on a substrate, wherein the energy bandgap of the metal oxide layer changes along a direction perpendicular to the surface of the substrate. The present invention also provides a semiconductor process forming said semiconductor structure.


Patent
United Microelectronics | Date: 2016-09-22

A method for manufacturing a BSI image sensor includes following steps: A substrate is provided. The substrate includes a front side and a back side opposite to the front side. The substrate further includes a plurality of isolation structures and a plurality of sensing elements formed therein. Next, the isolation structures are exposed from the back side of the substrate. Subsequently, a thermal treatment is performed to the back side of the substrate to form a plurality of cambered surfaces on the back side of the substrate. The cambered surfaces are formed correspondingly to the sensing elements, respectively.


Patent
United Microelectronics | Date: 2016-10-03

A semiconductor device having metal gate includes a substrate, a metal gate formed on the substrate, a pair of spacers formed on sidewalls of the metal gate, a contact etch stop layer (CESL) covering the spacers, an insulating cap layer formed on the metal gate, the spacers and the CESL, and an ILD layer surrounding the metal gate, the spacers, the CESL and the insulating cap layer. The metal gate, the spacers and the CESL include a first width, and the insulating cap layer includes a second width. The second width is larger than the first width. And a bottom of the insulating cap layer concurrently contacts the metal gate, the spacers, the CESL, and the ILD layer.


Patent
United Microelectronics | Date: 2016-06-06

A manufacturing method of a high-voltage metal-oxide-semiconductor (HV MOS) transistor device is provided. The manufacturing method includes the following steps. A semiconductor substrate is provided. A patterned conductive structure is formed on the semiconductor substrate. The patterned conductive structure includes a gate structure and a first sub-gate structure. The semiconductor substrate has a first region and a second region respectively disposed on two opposite sides of the gate structure. The first sub-gate structure is disposed on the first region of the semiconductor substrate. The first sub-gate structure is separated from the gate structure. A drain region is formed in the first region of the semiconductor substrate. A first contact structure is formed on the drain region and the first sub-gate structure. The drain region is electrically connected to the first sub-gate structure via the first contact structure.


Patent
United Microelectronics | Date: 2016-10-06

A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.


Patent
United Microelectronics | Date: 2016-08-19

A method of forming a fin-shaped structure includes the following step. A substrate having a first area and a second area is provided. An epitaxial structure is formed in the first area. An epitaxial structure is formed in the second area after the epitaxial structure in the first area is formed, wherein the surface area of the epitaxial structure in the first area is different from the surface area of the epitaxial structure in the second area.


Patent
United Microelectronics | Date: 2016-09-07

A semiconductor process includes the following steps. Metal patterns are formed on a first dielectric layer. A modifiable layer is formed to cover the metal patterns and the first dielectric layer. A modification process is performed to modify a part of the modifiable layer on top sides of the metal patterns, thereby top masks being formed. A removing process is performed to remove a part of the modifiable layer on sidewalls of the metal patterns but preserve the top masks. A dielectric layer having voids under the top masks and between the metal patterns is formed. Moreover, the present invention also provides a semiconductor structure formed by said semiconductor process.


A method for fabricating semiconductor device is disclosed. First, a substrate is provided, in which the substrate includes a first metal gate and a second metal gate thereon, a first hard mask on the first metal gate and a second hard mask on the second metal gate, and a first interlayer dielectric (ILD) layer around the first metal gate and the second metal gate. Next, the first hard mask and the second hard mask are used as mask to remove part of the first ILD layer for forming a recess, and a patterned metal layer is formed in the recess, in which the top surface of the patterned metal layer is lower than the top surfaces of the first hard mask and the second hard mask.


Patent
United Microelectronics | Date: 2016-09-12

A method for manufacturing a semiconductor device having metal gates includes following steps. A substrate including a first transistor and a second transistor formed thereon is provided. The first transistor includes a first gate trench and the second transistor includes a second gate trench. A patterned first work function metal layer is formed in the first gate trench and followed by forming a second sacrificial masking layer respectively in the first gate trench and the second gate trench. An etching process is then performed to form a U-shaped first work function metal layer in the first gate trench. Subsequently, a two-step etching process including a strip step and a wet etching step is performed to remove the second sacrificial masking layer and portions of the U-shaped first work function metal layer to form a taper top on the U-shaped first work function metal layer in the first gate trench.

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