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Migdal Ha‘Emeq, Israel

Andreou C.M.,University of Cyprus | Paccagnella A.,University of Padua | Gonzalez-Castano D.M.,University of Santiago de Compostela | Gomez F.,University of Santiago de Compostela | And 7 more authors.
Proceedings - IEEE International Symposium on Circuits and Systems | Year: 2015

A low-power, wide temperature range, radiation tolerant CMOS voltage reference is presented. The proposed reference circuit exhibits a voltage deviation of 0.8mV for 3-MeV protons total ionization dose of 2Mrad and a voltage deviation of 3.8mV for 10-keV X-rays total ionization dose of 4Mrad while being biased at the nominal supply voltage of 0.75V during X-ray irradiation. In addition, the circuit consumes only 4μW and exhibits a measured Temperature Drift of 15ppm/°C for a temperature range of 190°C (-60°C to 130°C) at the supply voltage of 0.75V. It utilizes only CMOS transistors, operating in the subthreshold regime, and poly-silicon resistors without using any diodes or external components such as compensating capacitors. The circuit is radiation hardened by design (RHBD), it was fabricated using TowerJazz Semiconductor's 0.18μm standard CMOS technology and occupies a silicon area of 0.039mm2. The proposed voltage reference is suitable for high-precision and low-power space applications. © 2015 IEEE.


Libertino S.,CNR Institute for Microelectronics and Microsystems | Corso D.,CNR Institute for Microelectronics and Microsystems | Lisiansky M.,Tower Semiconductor | Roizin Y.,Tower Semiconductor | And 5 more authors.
IEEE Transactions on Nuclear Science | Year: 2012

Threshold voltage (Vth) and drain-source current (I DS) behaviour of nitride read only memories (NROM) were studied both in situ during irradiation or after irradiation with photons and ions. V th loss fluctuations are well explained by the same Weibull statistics regardless of the irradiation species and total dose. Results of drain current measurements in-situ during irradiation with photons and ions reveal a step-like increase of IDS with the total irradiation dose. A brief physical explanation is also provided. © 1963-2012 IEEE.


Corso D.,CNR Institute for Microelectronics and Microsystems | Libertino S.,CNR Institute for Microelectronics and Microsystems | Lisiansky M.,Tower Semiconductor | Roizin Y.,Tower Semiconductor | And 5 more authors.
IEEE Transactions on Electron Devices | Year: 2012

Threshold voltage (Vth) behavior of nitride read-only memories (NROMs) was studied after irradiation with photons (γ- and X-rays), light and heavy ions. Both programmed and nonprogrammed single cells were investigated. The data suggest that two main physical phenomena are contributing to Vth variation and that the Vth loss and the variability can be modeled by a Weibull statistics with a shape parameter k∼2.2 regardless of the irradiation species and total dose. The same peculiarities were found in large memory arrays, confirming the results from single-cell studies but with significantly larger statistics. Hence, once the irradiation dose is known, the Vth loss distribution can be obtained, thus providing a predictive model of the radiation tolerance of NROM memory arrays. © 2012 IEEE.


Dagan H.,Ben - Gurion University of the Negev | Shapira A.,Tel Aviv University | Teman A.,Ben - Gurion University of the Negev | Teman A.,Ecole Polytechnique Federale de Lausanne | And 7 more authors.
IEEE Journal of Solid-State Circuits | Year: 2014

The key factor in widespread adoption of Radio Frequency Identification (RFID) technology is tag cost minimization. This paper presents the first low-cost, ultra-low power, passive RFID tag, fully integrated on a single substrate in a standard CMOS process. The system combines a 24 GHz, dual on-chip antenna, RF front-end, and a C-Flash based, rewritable, non-volatile memory module to achieve full on-chip system integration. The complete system was designed and fabricated in the TowerJazz 0.18 μm CMOS technology without any additional mask adders. By embedding the RF, memory, and digital components together upon a single substrate in a standard digital process, the low-cost aspirations of the "5-cent RFID tag" become feasible. Design considerations, analysis, circuit implementations, and measurement results are presented. The entire system was fabricated on a 3.6 mm × 1.6 mm (6.9 mm2) die with the integrated antennas comprising 82% of the silicon area. The total read power was measured to be 13.2 μW, which is sufficiently supplied by the on-chip energy harvesting unit. © 2014 IEEE.

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