United States
United States

Teradyne , based in North Reading, Massachusetts in the United States, is a developer and supplier of automatic test equipment . The company's divisions Semiconductor Test and Systems Test Group, are organized by the products they develop and deliver. Teradyne's high-profile customers include Samsung, Qualcomm, Intel, Analog Devices, Texas Instruments and IBM. Wikipedia.

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Patent
Teradyne Inc. | Date: 2016-01-26

A tester interface unit comprising a test hardware module. The test hardware module may have a simple construction, relying on control and/or signal processing in one or more tester instruments to generate or analyze test signals for a device under test. The test hardware module may be disposed within the tester interface unit, providing a short and high integrity signal path length to the device under test. The tester interface unit may include a purge gas chamber and a cooling chamber, with the hardware module penetrate a separator between those chambers, sealing an opening between the purge gas chamber and the cooling chamber. A heat spreader may move heat generated on the portion of the test hardware module in the purge gas chamber to the cooling chamber.


Patent
Teradyne Inc. | Date: 2015-08-31

A test system includes a transporter having test sockets, where each test socket is configured to receive a device to be tested by the test system, and each test socket includes an element that is controllable to change a temperature of a device in the test socket through thermal conduction. The test system includes a test rack comprising slots. The transporter is configured for movement into, and out of, a slot of the test rack to test devices in the test sockets.


Patent
Teradyne Inc. | Date: 2015-11-25

An example process for determining electrical path lengths includes: injecting current into a transmission line having a known capacitance per unit of length; determining a rate of change in voltage on the transmission line in response to the current; determining a capacitance of the transmission line based on the change in voltage; and determining an electrical path length of the transmission line based on the determined capacitance of the transmission line and the known capacitance per unit of length.


Patent
Teradyne Inc. | Date: 2015-11-20

Example automatic test equipment (ATE) includes: a test instrument for outputting test signals to test a device under test (DUT), and for receiving response signals based on the test signals; a device interface board (DIB) connected to the test instrument, with the DIB including an application space having a site to which the DUT connects, and with the test signals and the response signals passing through the site; and calibration circuitry in the application space on the DIB. The calibration circuitry includes a communication interface over which communications pass, with the communications comprising control signals to the calibration circuitry and measurement signals from the calibration circuitry. The calibration circuitry also includes non-volatile memory to store calibration data and is controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument.


Patent
Teradyne Inc. | Date: 2015-08-05

Apparatus and methods for calibrating tester channels of an automated test system are described. A relay matrix assembly comprising a plurality of microelectromechanical (MEM) switches may be used to connect a plurality of tester channels to analyzer calibration instrument rapidly without requiring serial, robotic probing of the test channels. The relay matrix assembly may be constructed on a printed circuit board that can be attached to an interface on the tester. Calibration parameters for the test channels may be calculated from waveforms received through the relay matrix assembly and that have been corrected to remove waveform distortion introduced by the relay matrix assembly. Parameters to correct for distortion in the relay matrix assembly may be measured in advance and stored for use when calibration is to be performed.


Patent
Teradyne Inc. | Date: 2015-12-10

An example circuit board structure includes: a substrate; and vias that are electrically conductive and that pass through the substrate to enable electrical connection through the circuit board structure. The substrate is thinner, and lengths of the vias are shorter, in first areas of the circuit board structure that deliver first speed signals than in second areas of the circuit board structure that deliver second speed signals and power. The first speed signals have a shorter rise time than the second speed signals.


Patent
Teradyne Inc. | Date: 2015-12-07

Example automatic test equipment (ATE) includes: a test instrument for outputting test signals to test a device under test (DUT), and for receiving output signals from the DUT, with the test instrument including a front-end module, and with the front-end module including internal circuitry for performing functions relating to the DUT; and external circuitry for performing the functions relative to the DUT via the test instrument, with the external circuitry being external to the front-end module and being shared among multiple front-end modules or channels of the test instrument. The test instrument is configurable to use either (i) the internal circuitry, (ii) the external circuitry, or (iii) a combination of circuits in the internal circuitry and the external circuitry to perform the functions.


Patent
Teradyne Inc. | Date: 2015-10-23

An example manipulator for transporting a test head includes: a tower having a base and a track, with the track being vertical relative to the base; an arm to enable support for the test head, with the arm being connected to the track to move the test head vertically relative to the tower; one or more motors to drive movement of the arm along the track; and pneumatic cylinders to control movement of the arm to cause the test head to apply an amount of force to a peripheral device.


An electronic system, comprising a first semiconductor device, a second semiconductor device, a clock circuit, and a plurality of independently adjustable calibration circuits connected in each of the plurality of serial data paths. The first semiconductor device may comprise a plurality of Serializer-Deserializer interfaces. The second semiconductor device may comprise a plurality of serial data interfaces coupled to the plurality of Serializer-Deserializer interfaces to provide a plurality of serial data paths between the first semiconductor device and the second semiconductor device. The plurality of Serializer-Deserializer interfaces and the plurality of serial data interfaces may be clocked from a clock signal derived from the clock circuit. The plurality of independently adjustable calibration circuits may be configured to compensate for timing differences across the plurality of serial data paths.


Patent
Teradyne Inc. | Date: 2015-04-16

An example test system includes a bus interface to connect to a bus of a computer system; and test instruments to perform one or more test operations on a UUT, where the test instruments connect to the bus interface to enable communication between the computer system and the test instruments via the bus interface. At least one test instrument includes: ports to which the UUT is connectable, with each of the ports interfacing to a corresponding peripheral bus supported by the at least one test instrument; circuits to connect the bus interface to the peripheral buses, with each circuit being configured to convert between a bus interface protocol run on the bus interface and a peripheral bus protocol run on a peripheral bus; and a switch to identify a target circuit of the circuits, with the switch to direct communications between the computer system and the target circuit.

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