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Braunschweig, Germany

Thiele D.,TU Braunschweig | Ernst R.,TU Braunschweig | Diemer J.,Symtavision
IEEE Vehicular Networking Conference, VNC | Year: 2016

Ethernet is considered as a future communication standard for distributed embedded systems in the automotive and industrial domains. A key challenge is the deterministic low-latency transport of Ethernet frames, as many safety-critical real-time applications in these domains have tight timing requirements. Time-sensitive networking (TSN) is an upcoming set of Ethernet standards, which (among other things) address these requirements by specifying new quality of service mechanisms in the form of different traffic shapers. In this paper, we consider TSN's time-aware and peristaltic shapers and evaluate whether these shapers are able to fulfill these strict timing requirements. We present a formal timing analysis, which is a key requirement for the adoption of Ethernet in safety-critical real-time systems, to derive worst-case latency bounds for each shaper. We use a realistic automotive Ethernet setup to compare these shapers to each other and against Ethernet following IEEE 802.1Q. © 2015 IEEE.

Tobuschat S.,TU Braunschweig | Axer P.,TU Braunschweig | Ernst R.,TU Braunschweig | Diemer J.,Symtavision
2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2013 | Year: 2013

Increasing demand for performance and further integration promotes the use of multi- and many-core systems - also in safety-critical embedded systems. In this domain, hardware platforms obviously have to support real-time, predictability constrained applications such as an anti-lock braking system. However, the on-going trend to integrate multiple functions with different criticalities (mixed critical) on a single platform calls for a paradigm shift. Mixed-critical systems require special attention with respect to functional (access protection) and non-functional (performance) isolation. An additional layer of protection and guaranteed service on the underlying infrastructure enables the efficient adoption of such architectures in safety-critical domains. In this paper, we present the IDAMC, a many-core platform which provides mechanisms to integrate applications of different criticalities on a single platform. © 2013 IEEE.

Axer P.,TU Braunschweig | Thiele D.,TU Braunschweig | Ernst R.,TU Braunschweig | Diemer J.,Symtavision
Proceedings - Design Automation Conference | Year: 2014

New hard real-time Advanced Driver Assistance Systems such as the Collision-Avoidance System push the bandwidth requirements of the communication infrastructure to a new level. Controller Area Network (CAN) and FlexRay are reaching their limits. Ethernet-based automotive networks such as Ethernet AVB are capable of addressing these requirements. However, designing predictable Ethernet networks is more complex than the design of a traditional CAN bus. Formal real-time performance characteristics are key to a successful Ethernet integration. In this paper we present an improved Ethernet AVB performance analysis which exploits traffic-stream correlations. The results are significantly tighter compared to related work. Copyright 2014 ACM.

Agency: Cordis | Branch: FP7 | Program: CP | Phase: ICT-2007.3.3 | Award Amount: 2.09M | Year: 2007

A large class of embedded systems has safety, availability, reliability, timing and performance requirements. Timing analysis is needed in many steps of the development process; it is a key to rapid designing and prototyping of embedded systems, to reduce system overall cost through efficient resource management (especially: tradeoffs when co-developing hardware and software), to find bottlenecks in the software, and to validate that the system meets its timing requirements. There is a growing awareness of the importance of correct timing for these systems, however, there is still a lack of efficient methods and tools for timing assessment and validation that can be used in European industry. The existing timing analysis technology by far does not exploit the potential inherent in European research results and timing tools. The ALL-TIMES project aims at combining and developing research results and timing tools currently available and thus to strengthen the European lead in the timing analysis area. The ALL-TIMES project will enable interoperability of tools from SMEs and universities, and develop integrated tool chains using open tool frameworks and interfaces. By combining research results and commercial tools, ALL-TIMES will ensure the flow of ideas from basic research to practice. ALL-TIMES will strengthen the competitiveness of several key industries in Europe, not only the automotive and aerospace areas (where partial awareness already exists) but also automation, manufacturing, robotics, medical, communication, and multimedia, and other market areas where timing is of importance.

Agency: Cordis | Branch: H2020 | Program: RIA | Phase: ICT-01-2014 | Award Amount: 5.70M | Year: 2015

SAFURE targets the design of cyber-physical systems by implementing a methodology that ensures safety and security by construction. This methodology is enabled by a framework developed to extend system capabilities so as to control the concurrent effects of security threats on the system behaviour. The current approach for security on safety-critical embedded systems is generally to keep subsystems separated, but this approach is now being challenged by technological evolution towards openness, increased communications and use of multi-core architectures. The objectives of SAFURE are to (1) implement a holistic approach to safety and security of embedded dependable systems, preventing and detecting potential attacks; (2) to empower designers and developers with analysis methods, development tools and execution capabilities that jointly consider security and safety; (3) to set the ground for the development of SAFURE-compliant mixed-critical embedded products. The results of SAFURE will be (1) a framework with the capability to detect, prevent and protect from security threats on safety, able to monitor from application level down to the hardware level potential attacks to system integrity from time, energy, temperature and data threats; (2) a methodology that supports the joint design of safety and security of embedded systems, assisting the designer and developers with tools and modelling languages extensions; (3) proof-of concept through 3 industrial use cases in automotive and telecommunications; (4) recommendations for extensions of standards to integrate security on safety-critical systems; (5) specifications to design and develop SAFURE-compliant products. The impact of SAFURE will help European suppliers of safety-critical embedded products to develop more cost and energy-aware solutions. To ensure this impact, a community will be created around the project. SAFURE comprises 7 industrial manufacturers, 4 leading universities and research centres and 1 SME.

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