Garching bei Munchen, Germany
Garching bei Munchen, Germany

SUSS MicroTec is a supplier of equipment and process solutions for the semiconductor industry and related markets.The high precision microstructuring systems like photolithography tools are used for manufacturing of processors, memory chips, MEMS, LED and other micro system devices.SUSS MicroTec is headquartered in Garching near Munich, Germany. Wikipedia.


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Grant
Agency: European Commission | Branch: H2020 | Program: ECSEL-IA | Phase: ECSEL-02-2014 | Award Amount: 181.08M | Year: 2015

The SeNaTe project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 12nm and 10nm technology nodes. The main objective is the demonstration of the 7nm IC technology integration in line with the industry needs and the ITRS roadmap on real devices in the Advanced Patterning Center at imec using innovative device architecture and comprising demonstration of a lithographic platform for EUV and immersion technology, advanced process and holistic metrology platforms, new materials and mask infrastructure. A lithography scanner will be developed based on EUV technology to achieve the 7nm module patterning specification. Metrology platforms need to be qualified for N7s 1D, 2D and 3D geometries with the appropriate precision and accuracy. For the 7nm technology modules a large number of new materials will need to be introduced. The introduction of these new materials brings challenges for all involved processes and the related equipment set. Next to new deposition processes also the interaction of the involved materials with subsequent etch, clean and planarization steps will be studied. Major European stakeholders in EUV mask development will collaboratively work together on a number of key remaining EUV mask issues. The first two years of the project will be dedicated to find the best options for patterning, device performance, and integration. In the last year a full N7 integration with electrical measurements will be performed to enable the validation of the 7nm process options for a High Volume Manufacturing. The SeNaTe project relates to the ECSEL work program topic Process technologies More Moore. It addresses and targets as set out in the MASP at the discovery of new Semiconductor Process, Equipment and Materials solutions for advanced CMOS processes that enable the nano-structuring of electronic devices with 7nm resolution in high-volume manufacturing and fast prototyping.


Patent
Suss MicroTec | Date: 2016-05-10

An industrial-scale apparatus, system, and method for handling precisely aligned and centered semiconductor wafer pairs for wafer-to-wafer aligning and bonding applications includes an end effector having a frame member and a floating carrier connected to the frame member with a gap formed therebetween, wherein the floating carrier has a semi-circular interior perimeter. The centered semiconductor wafer pairs are positionable within a processing system using the end effector under robotic control. The centered semiconductor wafer pairs are bonded together without the presence of the end effector in the bonding device.


The invention relates to a method for regulating a light source of a photolithography exposure system which comprises a plurality of LEDs, by means of the following steps: the light output of the individual LEDs in specific wavelength ranges is detected, and the detected light output is compared with a desired light output distribution over the entire spectrum. The LEDs are operated such that the desired spectral light output distribution is achieved in the most precise manner possible. The invention also relates to an exposure assembly for a photolithography device, having a light source which comprises a plurality of LEDs, a control means which controls the electrical power supplied to the individual LEDs, and a sensor which can detect the light output of the LEDs in the respective ranges of the wavelengths.


Patent
Suss MicroTec | Date: 2016-05-27

A device for treating a disc-shaped substrate is disclosed, comprising a support which has a support face for the disc-shaped substrate and a support adapter which can be coupled to the support and can support a mask used for treating the disc-shaped substrate, wherein an interface is provided which detects the coupling of the support adapter to the support and wherein a control system is provided which cooperates with the interface and detects whether the support adapter is coupled to the support, in particular whether the interface is occupied. A support adapter for use in a device of this type is further disclosed.


Patent
Suss MicroTec | Date: 2016-06-21

Described methods and apparatus provide a controlled perturbation to an adhesive bond between a device wafer and a carrier wafer. The controlled perturbation, which can be mechanical, chemical, thermal, or radiative, facilitates the separation of the two wafers without damaging the device wafer. The controlled perturbation initiates a crack either within the adhesive joining the two wafers, at an interface within the adhesive layer (such as between a release layer and the adhesive), or at a wafer/adhesive interface. The crack can then be propagated using any of the foregoing methods, or combinations thereof, used to initiate the crack.


A sealing ring for attaching to a cover ring of a wafer treating device has an annular carrier and a sealing lip which is releasably attached to the carrier.


Patent
Suss MicroTec | Date: 2016-04-08

A method for coating substrates provided with vias uses a first step in which the substrate is conditioned and a second step in which the substrate is coated with an electrically insulating material such that the vias are filled up completely.


Patent
Suss MicroTec | Date: 2016-04-08

A device for applying a coating to a substrate comprises a metering device by means of which a coating fluid can be applied to the substrate as a jet, and a solvent dispenser which is arranged eccentrically and to the side of the front end of the metering device in such a way that a predetermined amount of solvent can be administered to the front end of the metering device. This device can implement a method for applying a coating to a substrate wherein, before the coating fluid is applied, a predetermined amount of solvent is brought to the front end of the metering device in such a way that the solvent comes into contact with the coating fluid located there. After a waiting period, the coating fluid is subsequently applied to the substrate by means of the metering device.


A method for curing at least in part a photoresist applied to a substrate comprises the following steps: The substrate coated with the photoresist is arranged on a support. The photoresist is subjected to a suitable temperature for curing the photoresist for a first predetermined time period. After the first predetermined time period has passed, the substrate is lifted from the support, rotated, re-placed onto the support and subjected to a suitable temperature for curing the photoresist for a second predetermined time period. This method can be performed with a device for curing at least in part a photoresist applied to a substrate, comprising a chamber, a support which is arranged in the chamber and on which the substrate can be arranged, and a rotating device for rotating the substrate between a first and a second phase of the curing of the photoresist.


A spacer displacement device for a wafer illumination unit comprises an actuator, a spacer which can be displaced between an active and an inactive position by the actuator, and a force transmission element which is coupled to the actuator. The force transmission element consists of wire.

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