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Li Z.,CAS Institute of Microelectronics | Liu Y.,CAS Institute of Microelectronics | Kuang Z.,Superpix Micro Technology Co. | Chen J.,CAS Institute of Microelectronics
Journal of Semiconductors | Year: 2014

This paper presents a capacitor-free CMOS low dropout voltage regulator which has high PSR performance and low chip area. Pole splitting and g m boosting techniques are employed to achieve good stability. The capacitor-free chip LDO was fabricated in commercial 0.18 μm CMOS technology provided by GSMC (Shanghai, China). Measured results show that the capacitor-free LDO has a stable output voltage 1.79 V, when supply voltage changes from 2.5 to 5 V, and the LDO is capable of driving maximum 100 mA load current. The LDO has high power supply rejection about -79 dB at low frequency and -40 dB at 1 MHz frequency, while sacrifice of the LDO's active chip-area is only smaller than 0.02 mm2. © 2014 Chinese Institute of Electronics. Source


Jin X.,Xiangtan University | Jin X.,Superpix Micro Technology Co. | Zeng Y.,Xiangtan University
2010 International Conference on Measuring Technology and Mechatronics Automation, ICMTMA 2010 | Year: 2010

In this paper, a kind of nanoscale gap microlens array is designed and fabricated on 2.8um pixels based on 0.18um CMOS imager process to increase the photodetector sensitivity and to decrease the optical crosstalk. Both imaging techniques of SEM and atomic force microscopy (AFM) have been adopted to study surface structure. Especially, AFM's probe can touch the sample surface and AFM is suitable all material surface. It is first to adopt the AFM to investigate the surface topography of microlens array that provide detailed topographical information about microlens features. As a result of this study, nanoscale gap microlens array has been successfully designed and fabricated whose gap is about 117nm. This nanoscale gap microlens array can be widely integrated onto photo-detector products to improve the light collection efficiency, increase the pixel fill factor and reduce the optical crosstalk. © 2010 IEEE. Source


Jin X.,Superpix Micro Technology Co. | Jin X.,University of Western Ontario | Liu Z.,Superpix Micro Technology Co. | Chen J.,Superpix Micro Technology Co.
Chinese Optics Letters | Year: 2010

A digital still camera image processing system on a chip, different from the video camera system, is presented for mobile phone to reduce the power consumption and size. A new color interpolation algorithm is proposed to enhance the image quality. The system can also process fixed patten noise (FPN) reduction, color correction, gamma correction, RGB/YUV space transfer, etc. The chip is controlled by sensor registers by inter-integrated circuit (I2C) interface. The voltage for both the front-end analog and the pad circuits is 2.8 V, and the volatge for the image signal processing is 1.8 V. The chip running under the external 13.5-MHz clock has a video data rate of 30 frames/s and the measured power dissipation is about 75 mW. © 2010 Chinese Optics Latters. Source


Jin X.,Xiangtan University | Jin X.,Superpix Micro Technology Co. | Liu Z.,Superpix Micro Technology Co.
Optical Engineering | Year: 2010

We propose a fully digital programmable gain amplifier scheme that overcomes the clipped noise analog-to-digital converter (ADC) for complementary metal-oxide semiconductor (CMOS) image sensors. Adopting the new digital programmable gain amplifier (DPGA) scheme, it obtains low noise and low power usage, has a small size, and high robust gain characteristic. To reduce the clipping noise, one new current controling the reference voltage of a 9-bit flash ADC is brought about in this work. Using the fully digital amplification scheme with reduced clipping noise ADC solves almost all the problems of the conventional analog programmable gain amplifier (APGA) scheme, which has large noise, large power, and big chip size due to APGA, and two analog autozero loop (both clamping circuit loop and offset correction loop) circuits. Based on a 0.18-μm CMOS image sensor process, one product of video graphic array (VGA) format CMOS image sensor is fabricated. The silicon test shows a 68-dB dynamic range with the power consumption of 80 mW at 24 MHz and the total noise of about 2 mV (at 30 fps and 27 deg). © 2010 SPIE. Source


Jin X.,Xiangtan University | Jin X.,Superpix Micro Technology Co. | Jin X.,University of Western Ontario | Liu Z.,Superpix Micro Technology Co. | And 3 more authors.
2010 Symposium on Photonics and Optoelectronic, SOPO 2010 - Proceedings | Year: 2010

This paper presents about the design and fabrication of a cost effective and portable system for real time monitoring and data analysis of cell cultivation applications based on CMOS sensor and microfluidic technology. The digital CMOS sensor has 2-Mpixel resolution and output digital data that is designed and fabricated on the 0.18um CMOS image process. The Chip has integrated with low noise 2 shared 2.25T pinned photodiode active pixel, noise reduction circuit, analog to digital converter and timing control circuits. The module based on the 2-Mpixel CMOS sensor has two focuses that can capture the image of the business card so that the monitoring system is so compact and low power. In this paper, one microfluidic product has been fabricated based on the MEMS process that applies for cell cultivation. The online monitoring and analytical system uses CMOS image sensor to capture the image of the microfluidic applications and a field programmable gate array (FPGA) chip to process the captured image. The final image can be displayed in the monitor or be sent to computer to be stored. This technique can be utilized in monitoring the cell size lying on the pixel size of CMOS sensor. In this paper, the monitoring cell size is large than 2.8um for the pixel size of CMOS sensor is 2.8um. The advantages of this system not only provide miniaturization and minimum cost, but also offer many advantages over conventional laboratory experiments, such as low energy LED light, parallel and fast microfluidic chip, high resolution CMOS sensor, fast and accurate test, low cost and consumption, etc. ©2010 IEEE. Source

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