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Yogyakarta, Indonesia

Kusrini K.,STMIK AMIKOM Yogyakarta
Procedia Computer Science | Year: 2015

Two main activities in retail business are to determine the amount of stock that should be maintained and the profit margin for each item. As the inventory principle stated, both processes required to make categories group of 'fast moving' and 'slow moving' and use it as the consideration for the processes. Citramart Minimarket as a retail business has not yet been used that grouping and consideration in their sales information system for processing their item's minimum stock level and profit margin. The process is still done manually by arbitrary observations from a stock division staff. The categories that is used to determine the minimum stock and profit margin are also not the moving speed of item but rather the kind of items. This study aim to support the process of determining the minimum stock and profit margin by building a model that can group items into categories 'fast moving' and slow moving' using k-means clustering. K-means clustering is used in this study because the number of clusters required in categorization of items already set. The group cluster which has highest centroid will be the fast moving group, while the lowest centroid is the slow moving group. The data to be used in the research is taken from sales data for year 2014 and 2015. The clustering scenario uses combination of time, e.g. yearly and monthly, and variable, e.g. count of items and their transaction values. Using 3 clusters and delta value 0.2, the resulting best scenario is using yearly time and transaction value variable. The test is conducted by calculating the xie-beny index which results 36.265. © 2015 The Authors.

Wibowo F.W.,STMIK AMIKOM Yogyakarta
2011 Computation and Communication Technologies: 3rd International Conference on Advances in Computing, Control, and Telecommunication Technologies, ACT 2011 - Computer Science Series | Year: 2011

For a long ago, world of digital design has spread out in the many major and a lot of logics, approaches, and theories has been proposed. The digital emerges as a solution of a daily-life need and applicable on such technology from the developing devices until software-based. All of the designs has a significant point on the spesification, integration, and optimization. The designers have been trying to make a good designs on both hardware and software, latest both combinations have been known as the basic idea of hardware/ software co-design. The state-of-the art computer is very interesting to research because of its implementation can make changes of the cycle of reconfigurable objects. This paper presents a comparison of the two role plays in reconfigurable devices especially FPGA-based, i.e. Altera and Xilinx. The idea is that of a simple compiler has a good performance designs for synthesizing Very high speed integrated circuit Hardware Description Language (VHDL) code as well as the other complexity software that more powerful. So, this paper proposes such method as interoperability for reconfiguring devices to get the point why few of the standard VHDL code can't be synthesised in the different compiler of VHDL code between Xilinx and Altera. The project of compiler softwares that is observed from Xilinx is ISE and from Altera is Max+Plus II. Max+Plus II is a low-cost software than ISE Xilinx, although both Xilinx and Altera devices have a different structure each other.

Wibowo F.W.,STMIK AMIKOM Yogyakarta
Advanced Science Letters | Year: 2015

In general, a data communication transmission consists of data transmitter and data receiver modules. The data transmitter and receiver in the process could show noise between both modulator and demodulator. The data signal noise can emerge error on the data, so it need noise anticipation to correct code in signal. To implement the correction data in this paper implement Viterbi algorithm code on field programmable gate arrays (FPGAs) of Spartan-3E that is configured using very high speed integrated circuit (VHSIC) hardware description language (VHDL) on ISE Xilinx 9.2i application. In this paper shows that the modules consist of four modules, i.e., encoder, noise generator, decoder, and sequence generator modules. In addition, there are three main components of Viterbi decoding algorithm i.e., branch metric computation (BMC), add-compare and select (ACS) and trace- back decoding (TBD). The Viterbi decoder is used in wireless sensor network (WSN) to receiving data that is transmitted by other nodes. © 2015, American Scientific Publishers. All rights reserved.

Wibowo F.W.,STMIK AMIKOM Yogyakarta
Advanced Science Letters | Year: 2014

Pollution issues are all of countries in the world common problems. A lot of countries have policies to regulate their countries and reduce the pollutions, because this issue is very important in human lives. This paper uses parallax’s propeller demo board as controller. The mechanism of this instrumentation is to detect pollutant of carbon monoxide (CO) using gas sensor module. The gas detection data converted by analog to digital converter (ADC) attached on the gas sensor module. Parallax’s propeller is multi-core processor, so each core can be used to manage real-time data without waiting sequential instructions. The works of each module can be done by one propeller. GPS module is used to get data of latitude, longitude, altitude, date and time. These data are important thing for tracing position of the instrumentation placement on the map, e.g., google map. The data of time and date are used to know carbon monoxide concentration each time and when it is taken. Not only using GPS, but this instrumentation also used secure data (SD) card as the storage data of GPS and carbon monoxide concentration. © 2014 American Scientific Publishers All rights reserved.

Utama H.,STMIK AMIKOM Yogyakarta | Wibowo F.W.,STMIK AMIKOM Yogyakarta
2015 IEEE Student Conference on Research and Development, SCOReD 2015 | Year: 2015

The usage of the internet consists of several fields e.g. business, social, government, education, and so on. In business, the internet is needed to connect producers with consumers. Consumers do not need to come to a place to buy some goods. Transactions can be done at home using an internet connection. One of the usage of Internet technology is a web service. The emerging of this technology as there is paradigm of virtual enterprise. This indicates that the company sees the fact in the performance of all its business processes externally but in practice it does not happen. So, not all business processes run in a company but most business processes are also executed in its partner. The usage of the web service also allows the emergence of the threat of another party. This threat can be the vulnerability of confidentiality and integrity of data. One of way to handle is to use WS-Security framework. This framework is a standard web service security based-on XML. However, it is lacking in a lot of message exchange and occurs in specified time. This deficiency can be overcome by using WS-SecureConversation framework. The testing resulted by message exchange for 100 times shows that process time of WS-SecureConversation is lower than WS-Security usage. The data integrity aspect is done by request message modification to result an error message. The data availability aspect is done by invalid accessing to available services, this occurrence emerges denied system to serve service request so data availability are valid user only. © 2015 IEEE.

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