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Bixenman M.,KYZEN Corporation | Lober D.,KYZEN Corporation | McMeen M.,STI Electronics Inc. | Tynes J.,STI Electronics Inc.
SMT Surface Mount Technology Magazine | Year: 2015

Reliable hardware is more challenging to reproduce due to component size, residues trapped under bottom terminations, shorter distance between conductors, higher pinout devices in a smaller footprint, increased electrical field and environmental factors. Site-specific testing of the residue under the component termination has the potential to detect resistance drops. The test board has sensors placed under the bottom termination. The sensor traces provide real-time SIR data within the residue. Locally exposed traces route to the board?s edge for electrical access to volume between component and board. The species testing provides needed insight into quantifying ionic levels for each ion that can lead to a drop in resistance.


Cooper C.H.,STI Electronics Inc.
IPC APEX EXPO Technical Conference 2010 | Year: 2010

As the electronics industry moves toward smaller form and fit factors, advanced packaging technologies are needed to achieve these challenging design requirements. Current design problems are not driven by circuit design capabilities but by an inability to reliably package these circuits within the space constraints. Innovative packaging techniques are required in order to meet the increasing size, weight, power, and reliability requirements of this industry without sacrificing electrical, mechanical, or thermal performance. Emerging technologies such as those imbedding components within organic substrates have proven capable of meeting and exceeding these design objectives. Imbedded Component/Die Technology (IC/DT®) addresses these design challenges through imbedding both actives and passives into cavities within a multi-layer printed circuit board (PCB) to decrease the surface area required to implement the circuit design and increase the robustness of the overall assembly. A passive thermal management approach is implemented with an integrated thermal core imbedded within the multi-layer PCB to which high power components are mounted directly. This paper discusses the design methodology, packaging processes, and technology demonstrations of prototypes packaged using this technology. The various prototypes designed and manufactured using this technology will be presented.


Bixenman M.,Kyzen Corporation | Lober D.,Kyzen Corporation | McMeen M.,STI Electronics Inc | Tynes J.,STI Electronics Inc
2016 Pan Pacific Microelectronics Symposium, Pan Pacific 2016 | Year: 2016

Reliability test methods are performed during the manufacturing design phase to validate process conditions, with a goal to build electronic assemblies that meet reliability and product life objectives. Contract manufacturers (CM) build to the original equipment manufacturers (OEM) cleanliness specification in an effort to meet quality, performance and reliability expectations. Manufacturing engineers select the best materials available and match those material sets to process settings that produce high product yields. Highly accelerated life testing is used to validate the process by introducing high stress levels in order to quickly uncover material weaknesses. A weakness of current reliability test methods is that they are performed at the qualification and validation stage. The methods are run on test boards designed to simulate the actual product being built. Both electronic and chemical test methods are typically performed by outside reliability labs. Once the process is signed off by the OEM, CMs do not have a simple test method that they can use to verify that the product is being built to designed test levels. Ionic Testers were commonly used as a process check, but with the emergence of highly dense interconnects and more complex flux designs, this process tool no longer provides an accurate assessment. A novel, real-time test method has been designed to run a performance qualification on boards built with specified soldering materials, reflow settings and cleaning methods. High impedance measurements are performed on break-off coupons designed with same component geometries used to build the assembly. This test method provides a gauge of potential contamination sources coming from the assembly process that can contribute to electrochemical migration. If the process is outside limit values, the CM can do a root cause analysis and correct the problem. The purpose of this research paper is to present ongoing research with the objective to develop the real-time SIR test methodology for ensuring that assemblies are built to the designed specifications. © 2016 SMTA.


McMeen M.,STI Electronics Inc. | Tynes J.,STI Electronics Inc. | Bixenman M.,KYZEN Corporation | Lober D.,KYZEN Corporation
2016 Pan Pacific Microelectronics Symposium, Pan Pacific 2016 | Year: 2016

Circuit / System PCB designer's objective is to increase device functionality in a smaller form factor with a higher density electronic layout. Higher density and smaller form factor components are driving the industry toward a higher risk situation in intermittent electronic performance. Voltage leakage and even current leakage can lead to signal integrity loss and even flip bit issues or drops in processing commands. As the density increases and the miniaturization drops in size and spacing so does the increase in failure mode opportunities for signal integrity / signal loss. The spacing between conductors and pads in the past has been our friend and saving grace by giving us greater insulation between these conductors and pads. Even the standoff heights within the Z-Axis of miniaturized components are approaching one mil. This drop in z-axis means there is smaller cubic volume area to outgas volatiles or insure the volatization / boil off effect of flux additives such as inhibitors (against oxidation / corrosion), activators (promotes wetting) and thermal stabilizers (insures fluxing action at peak reflow temps) during reflow, flux residues can become entrapped under the component itself in a state that has not fully deactivated. Mobile ions within the flux residues form leakage currents and or voltages, especially when the device is operating within humid environments. Flux residue can contain halide / ionic materials which, when trapped under a part can lead to shorts across adjacent pads, or voltage/current leakage pathways. Companies who require devices to meet long term reliability / warranty expectations need an improved industry test specification that allows for an accurate risk assessment. The problem is that the risk assessment is a multi-variable issue influenced by flux type, flux make up (activators and inhibitors), activation temperature, component type and placement; the type and criticality of the circuit in which the component is operating in, wash characteristics if not a no-clean flux system, solder paste volume, PCB cleanliness and component contamination. Current measures of "clean" do not indicate if the product is clean enough in a critical area, which is what we hope to do. The goal is to design a test and test vehicle which encompasses the challenges of today so the System Design Engineer can define and characterize risk within his/her electronic assembly for long term reliability associated with cleanliness of the finished electronic assembly and final system warranty expectation. This is a tall order but there is a concern within critical industries such as Military, Medical, Automotive, Aerospace and safety critical industrial applications and industries to better define the risk and measure the risk associated with cleanliness. Cleanliness is a broad term for the mitigation and measurement of Electrochemical Migration (ECM) and pitting and creep corrosion, and general surface insulation breakdown due to free ionics. This paper will report ongoing research to study these multi-variant issues using a new test vehicle with sensors placed under and near bottom terminations such as QFN and LGA components. The test vehicles are designed to track impedance where it matters most. The goal of this research is to develop an improved method for studying multi-variables that may impact circuit / component reliability. This is not a single event / variable equation but a very complex multi - variable problem with varying degrees of interaction. Some of the main variables are processing equipment temperature controls / profiles; construction of the flux system and its chemical formulation; volume of flux residue remaining; and the type of component and its design as well as the plating finishes used on pads as well as the type of solder alloys used. This list was not all inclusive but gives an insight to the multi-variable problem statement. Data findings, inferences from the data findings, and recommendations will be documented and presented. © 2016 SMTA.


Trademark
STI Electronics Inc. | Date: 2016-04-07

Electronic components, circuit boards, assembly and soldering supplies. Custom fabrication and manufacture of pre-production prototypes of electronic components, circuits, circuit boards and equipment; manufacturing of electronic components, circuits, circuit boards and equipment, for others. Education and training in the field of electronic circuitry manufacturing, soldering instruction, procedures for manufacturing circuit boards and electronic circuitry; providing training courses electronics assembly; providing soldering and solder training courses; Lean Six Sigma training. Engineering research, consulting and contract engineering services in the field of electronics manufacturing, namely, performing product design and manufacture ability analysis; utilizing analytical tools, equipment and methods to characterize materials, detect failure modes, and perform exploratory analysis of products and processes; and providing written reports in the nature of hardware reviews, design validation, and production readiness assessments.


Grant
Agency: Department of Defense | Branch: Missile Defense Agency | Program: SBIR | Phase: Phase II | Award Amount: 911.35K | Year: 2015

This document outlines the activities proposed by STI Electronics Inc. to develop cleanliness requirements on a complex military electronics assembly using Real Time Surface Insulation Resistance (SIR). Real Time SIR testing under components allows for the non-destructive, real time data acquisition necessary to validate cleanliness in a production environment. This proposal outlines hardware configurations and testing performed to legitimize the short- and long- term reliability of Real Time SIR testing. It concentrates primarily on establishing the viability of non-destructively/non-intrusively quantifying ionic contamination levels beneath components to meet cleanliness requirements. If approved, this would allow for a wide range of solder fluxes, component packages, and manufacturing processes to be evaluated as they relate to meeting the newly proposed cleanliness standards. Approved for Public Release 15-MDA-8169 (20 March 15)

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