Ciganda Brasca L.M.,Polytechnic University of Turin |
Bernardi P.,Polytechnic University of Turin |
Sonza Reorda M.,Polytechnic University of Turin |
Barbieri D.,SPEA Test Equipment |
And 4 more authors.
Journal of Electronic Testing: Theory and Applications (JETTA) | Year: 2011
This paper describes a tester architecture for Accelerometer and Gyroscope Micro-ElectroMechanical System (MEMS) devices test and calibration, allowing increased parallelism rate and process accuracy. The proposed tester architecture tackles some critical issues related to MEMS testing, such as mitigating mechanical concerns that potentially impact on the equipment Mean Time Between Maintenance and guaranteeing a sufficient number of measurements in the time unit. The proposed strategy consists in an innovative and low cost tester resource partitioning that overcomes current limitations to multisite Accelerometer and Gyroscope MEMS testing. A tester prototype was implemented exploiting FPGAs; feasibility and effectiveness of the proposed methodology was demonstrated on commercial accelerometer and gyroscope MEMS devices. © 2011 Springer Science+Business Media, LLC.