Seoul, South Korea
Seoul, South Korea

SK Hynix Inc. is a South Korean memory semiconductor supplier of dynamic random access memory chips and flash memory chips. Hynix is the world's second-largest memory chipmaker and the world's sixth-largest semiconductor company. Founded as Hyundai Electronic Industrial Co., Ltd. in 1983 and known as Hyundai Electronics, the company has manufacturing sites in Korea, the US, China and Taiwan. In 2012, when SK Telecom became its major shareholder, Hynix merged to SK Group, the third largest conglomerate in South Korea. The company's shares are traded on the Korea Stock Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange.Hynix memory is used by Apple Inc. in some of their MacBook and Macbook Pro computers, by Asus in their Google-branded Nexus 7 tablet, is an OEM provider for IBM System x servers, and is used in PC desktops as well as the ASUS Eee PC. Dell and Hewlett-Packard have also used Hynix memory as OEM equipment. Other products which uses Hynix memory include DVD players, cellular phones, set-top boxes, personal digital assistants, networking equipment, and hard disk drives. Wikipedia.


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Patent
SK hynix | Date: 2016-04-12

A memory system may include: a plurality of memory blocks each including a plurality of page zones each page zone including a plurality of pages suitable for storing data; and a controller suitable for updating one or more closed memory blocks, by storing data into another memory block among the memory blocks in response to a write command for the one or more closed memory blocks, and updating a map list indicating one or more invalid page zones each of which contains only invalid pages in the closed memory blocks, as a result of the updating of the closed memory blocks.


Patent
SK hynix | Date: 2016-04-12

A memory system may include a memory device comprising a plurality of memory blocks, each of the plurality of memory blocks comprising a plurality of pages having a plurality of memory cells coupled to a plurality of word lines, the memory device being suitable for storing read data and write data requested by a host in the plurality of pages, and a controller suitable for grouping the plurality of pages included in the memory blocks, dividing each of the memory blocks into a plurality of sub-memory blocks, programming data corresponding to a write command received from the host into a first memory block of the memory blocks, performing an update program on the data programmed into the first memory block into the memory blocks in response to a write command for the data programmed into the first memory block from the host, and storing a map list for the sub-memory blocks included in the first memory block in accordance with the update program.


Patent
SK hynix | Date: 2016-05-17

An electronic device includes semiconductor memory. The semiconductor memory includes a cell array comprising a plurality of resistive memory cells arranged in a plurality of columns and a plurality of rows; and an access circuit applying a first voltage or a second voltage to a first node of a selected memory cell of the plurality of resistive memory cells, and applying a third voltage to a second node of the selected memory cell, the third voltage having a magnitude that is substantially the same as that of the first voltage and having a polarity that is opposite to a polarity of the first voltage.


Patent
SK hynix | Date: 2016-04-12

This technology relates to a memory system supporting a one-shot program and an operating method of the memory system The memory system may include: a first memory device comprising a first multi-level cell and a first multi-level buffer, a second memory device comprising a second multi-level cell and a second multi-level buffer, and a controller suitable for buffering input data in the first and the second multi-level buffers in an interleaving way, for rearranging and storing the buffered input data in a multi-level buffer selected from the first and second multi-level buffers if the input data have a size smaller than or equal to a preset size, wherein a one-shot program is performed on a memory device including the selected multi-level buffer.


Patent
SK hynix | Date: 2016-04-12

The memory system may include a memory device including: a plurality of planes each including a plurality of memory blocks suitable for storing data, and a plurality of page buffers corresponding to the planes; and a controller including a memory, the controller being suitable for performing a read operation to the memory blocks of a first plane storing a first data corresponding to a read command among the planes by referring to a meta-data of the first data, and for providing the first data to a host; wherein the meta-data is stored in the memory or the page buffers.


Patent
SK hynix | Date: 2016-04-11

A memory system may include a memory device including a plurality of memory blocks each having a plurality of pages suitable for storing data requested from a host, and a controller including a memory, and suitable for storing write data corresponding to a write command received from the host in a first memory block of the memory blocks, storing first and second map data corresponding to the write data written to the first memory block in a second memory block of the memory blocks, and storing a segment list for first segments of the first map data in the memory.


Patent
SK hynix | Date: 2016-04-11

A memory system may include a memory device comprising a plurality of memory blocks each having a plurality of pages; and a controller suitable for storing data in a first memory block among the memory blocks, storing map data of the data in a second memory block among the memory blocks, and scanning the map data by performing filtering on logical information of the data in response to a command.


Patent
SK hynix | Date: 2016-03-04

A data storage device includes a memory device including a plurality of memory cells; and a controller suitable for determining, based on data read from the plurality of memory cells, section cell numbers corresponding to threshold voltage sections, and for determining an average threshold voltage of a threshold voltage distribution selected among a plurality of threshold voltage distributions of the memory cells which are estimated based on the section cell numbers, based on a Gaussian distribution function.


Package-on-package (PoP) modules are provided. The PoP module includes a lower package and an upper package disposed over the lower package. The lower package includes a lower substrate and a lower chip disposed over a top surface of the lower substrate. The upper package includes an upper substrate, a plurality of upper chips disposed over a top surface of the upper substrate, and an upper molding member disposed over the plurality of upper chips. The upper molding member is divided into at least two parts which are separated from each other by a trench. Related memory cards and related electronic systems are also provided.


A semiconductor device according to an embodiment of the invention includes a pipe channel layer including a first portion and a second portion protruding from the first portion, first channel pillars protruding from the second portion of the pipe channel layer, and second channel pillars protruding from the first portion of the pipe channel layer.

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