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Seoul, South Korea

SK Hynix Inc. is a South Korean memory semiconductor supplier of dynamic random access memory chips and flash memory chips. Hynix is the world's second-largest memory chipmaker and the world's sixth-largest semiconductor company. Founded as Hyundai Electronic Industrial Co., Ltd. in 1983 and known as Hyundai Electronics, the company has manufacturing sites in Korea, the US, China and Taiwan. In 2012, when SK Telecom became its major shareholder, Hynix merged to SK Group, the third largest conglomerate in South Korea. The company's shares are traded on the Korea Stock Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange.Hynix memory is used by Apple Inc. in some of their MacBook and Macbook Pro computers, by Asus in their Google-branded Nexus 7 tablet, is an OEM provider for IBM System x servers, and is used in PC desktops as well as the ASUS Eee PC. Dell and Hewlett-Packard have also used Hynix memory as OEM equipment. Other products which uses Hynix memory include DVD players, cellular phones, set-top boxes, personal digital assistants, networking equipment, and hard disk drives. Wikipedia.


Patent
SK hynix | Date: 2016-01-06

A first power line configured to receive a first voltage, a second power line configured to receive a second voltage which is lower than the first voltage, a first clamping unit configured to be connected to the first power line, a second clamping unit configured to be connected between the first clamping unit and the second power line, and a discharging unit configured to, when an abnormal voltage introduced through the first power line or the second power line is applied, discharge the abnormal voltage by coupling with the first clamping unit or the second clamping unit are included.


Patent
SK hynix | Date: 2016-01-06

A first power line configured to receive a first voltage, a second power line configured to receive a second voltage which is lower than the first voltage, a first clamping unit configured to be connected to the first power line, a second clamping unit configured to be connected between the first clamping unit and the second power line, and a discharging unit configured to, when an abnormal voltage introduced through the first power line or the second power line is applied, discharge the abnormal voltage by coupling with the first clamping unit or the second clamping unit are included.


Patent
SK hynix | Date: 2016-01-08

A semiconductor device includes: a first active region defined by a recess contained in a device isolation film of a semiconductor substrate belonging to a first region and a second region, in a peripheral region including the first region, the second region, and a third region; a second active region defined by the device isolation film contained in the semiconductor substrate of the third region; a buried metal layer buried in the recess; a first conductive layer formed over the semiconductor substrate of the first region; and a second conductive layer formed over the semiconductor substrate of the second region, wherein the first conductive layer or the second conductive layer is formed over the semiconductor substrate of the third region. A three-dimensional dual gate is formed in a peripheral region, such that performance or throughput of transistors is maximized even in the peripheral region.


A method of operating a semiconductor memory device includes performing a first program operation to simultaneously increase threshold voltages of memory cells having different target levels to sub-levels lower than the different target levels, verifying the memory cells by using different verify voltages, respectively, performing a second program operation to divide the threshold voltages of the memory cells, and performing a third program operation to increase the threshold voltages of the memory cells to the different target levels, respectively.


A semiconductor integrated circuit comprises: a transistor region having a center line; a first block arranged in one side of the center line of the transistor region, and comprising a plurality of first and second groups each having a plurality of first and second segment transistors constituting first and second transistors of a differential amplifier; and a second block arranged in the other side of the center line, and having an arrangement corresponding to the arrangement of the first and second groups of the first block.

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