FOUNTAIN HILLS, AZ, United States
FOUNTAIN HILLS, AZ, United States

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Lepkowski W.,Arizona State University | Ghajar M.R.,Arizona State University | Wilk S.J.,Sjt Micropower Inc | Summers N.,Arizona State University | And 2 more authors.
IEEE Transactions on Electron Devices | Year: 2011

Metalsemiconductor field-effect transistors (MESFETs) have been fabricated using a 150-nm partially depleted silicon-on-insulator complementary metal-oxide-semiconductor (CMOS) technology. Minimum gate lengths of 150 nm have been achieved, which represents a significant reduction compared with an earlier demonstration using a 350-nm CMOS technology. The scaled MESFETs with Lg = 150 nm have a current drive that exceeds 200 mA/mm with a peak fT 35 GHz. This is considerably higher than the Lg = 400 nm MESFET with a current drive of ∼70 mA/mm and a peak fT = 10.6 GHz, which was possible with the earlier generation. However, short-channel effects become significant for Lg < 400 nm, resulting in an optimum MESFET gate length for this technology in the range of 200300 nm. © 2011 IEEE.


Lepkowski W.,Arizona State University | Lepkowski W.,Sjt Micropower Inc | Wilk S.J.,Arizona State University | Wilk S.J.,Sjt Micropower Inc | And 2 more authors.
Proceedings - IEEE International SOI Conference | Year: 2012

Depletion mode, n-channel MESFETs have been fabricated at a commercial 45nm SOI CMOS foundry without changing any of the process flow or including additional mask steps. 45nm represents the most scaled technology node used to date for MESFET fabrication and was first introduced in [1]. The work presented here builds upon those results and introduces a slightly altered MESFET structure which enhances the voltage capability to >20V and improves its lifetime reliability. Current drives of >65mA/mm have been observed along with a peak cut-off frequency, fT, of 27GHz and maximum oscillation frequency, fmax, of 33GHz. © 2012 IEEE.


Wilk S.J.,Arizona State University | Wilk S.J.,Sjt Micropower Inc | Balijepalli A.,Arizona State University | Ervin J.,Arizona State University | And 3 more authors.
Solid-State Electronics | Year: 2010

CMOS compatible, high voltage SOI MESFETs have been fabricated using a standard 3.3 V CMOS process without any changes to the process flow. A 0.6 μm gate length device operates with a cut-off frequency of 7.3 GHz and a maximum oscillation frequency of 21 GHz. There is no degradation in device performance up to its breakdown voltage, which greatly exceeds that of CMOS devices on the same process. Other figures-of-merit of relevance to RF front-end design are presented, including the maximum stable gain and noise figure. An accurate representation of the device in SPICE has been developed using the commercially available TOM3 model. Using the SOI MESFET model, a source degenerated low noise RF amplifier targeting operation near 1 GHz has been designed. The amplifier was fabricated on a PCB board and operates at 940 MHz with a minimum NF of 3.8 dB and RF gain of 9.9 dB while only consuming 5mW of DC power. © 2009 Elsevier Ltd. All rights reserved.


Wilk S.J.,Arizona State University | Wilk S.J.,Sjt Micropower Inc | Ghajar M.R.,Arizona State University | Lepkowski W.,Arizona State University | And 4 more authors.
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium | Year: 2012

Enhanced voltage silicon metal-semiconductor-field-effect-transistors (MESFETs) have been fabricated on a 45nm SOI CMOS technology with no process changes. MESFETs scaled to L g = 184nm were fabricated and show a peak f T of 35GHz, current drive of 112mA/mm and breakdown voltages exceeding 4.5V whereas the nominal CMOS voltage was less than 1V on the same process. The devices were characterized from DC to 40GHz and an industry standard TOM3 model has been developed describing their operation. A board level Class AB power amplifier operating at 433MHz was designed, fabricated and measured to have a peak output power of 17dBm and peak PAE of 42.5%. The supply voltage of the PA was more than twice the breakdown voltage of corresponding CMOS on the same semiconductor process. The measured PA results were used to validate the model across different bias and input power level conditions. © 2012 IEEE.


Wilk S.J.,Sjt Micropower Inc | Lepkowski W.,Sjt Micropower Inc | Thornton T.J.,Arizona State University
IEEE Microwave and Wireless Components Letters | Year: 2013

A silicon metal-semiconductor-field-effect-transistor (MESFET) power amplifier operating at 900 MHz fabricated on a 45 nm silicon-on-insulator CMOS process with no changes to the process flow is presented. The soft breakdown of the MESFET is 20 times that of the MOSFET and allowed a single transistor amplifier based on Class A bias conditions to operate at up to 32 dBm output power with an 8 V drain bias. The amplifier had a peak power added efficiency of 37.6%, gain of 11.1 dB, OIP3 of 39.3 dBm and 1 dB compression point at an output power of 31.6 dBm. The device required only 0.125 mm2 of active area. Additionally, the depletion mode operation of the MESFET enables a simple input bias approach using an inductor to ground at the gate of the device. © 2001-2012 IEEE.


Grant
Agency: National Aeronautics and Space Administration | Branch: | Program: SBIR | Phase: Phase I | Award Amount: 99.95K | Year: 2010

We have developed a fully integrated LDO regulator using a patented transistor technology that can be manufactured in high volume commercial semiconductor foundries with no changes to the process flow. The regulator is stable under all load conditions without the need for an external compensation capacitor thereby reducing the mass/volume of the power management system and increasing reliability. The existing LDO component has very competitive figures of merit (dropout voltage, transient response, power supply rejection) compared to existing components targeting commercial consumer electronics. The work we are proposing for this Phase 1 activity will confirm the expected wide temperature range operation (-180C to +150C) and radiation tolerance (200krads(Si) to 1 Mrad(Si)) of the existing component. Based on these measurements we shall design, simulate and layout LDO regulators for nominal load currents of 100 mA and 1A for fabrication at two rad-hard CMOS foundries during a follow-on Phase 2 activity. The LDO regulators will be designed as drop-in replacements for many existing components. They can also be integrated directly on chip as part of an application specific integrated circuit thereby reducing the chip count still further.


Grant
Agency: National Aeronautics and Space Administration | Branch: | Program: SBIR | Phase: Phase I | Award Amount: 100.00K | Year: 2011

We have developed a novel metal-semiconductor field-effect-transistor (MESFET) technology suitable for extreme environment electronics. The MESFET technology is fully CMOS-compatible and can be integrated alongside conventional MOSFETs with no changes to the process flow. Unlike the MOSFETs however, the MESFETs do not require a fragile metal-oxide-semiconductor (MOS) interface and are extremely robust. With breakdown voltages in the range 10-50V the MESFET operating voltage greatly exceeds that of the accompanying CMOS. The combination of CMOS compatibility with high breakdown voltage allows for integrated DC-to-DC power conversion solutions that would otherwise require discrete components based on laterally diffused metal-oxide-semiconductor (LDMOS) devices. The MESFETs are intrinsically radiation tolerant up to 1 Mrad(Si) and have been demonstrated to work over the temperature range -196C to +150C. The Phase 1 R & D we are proposing will characterize the large signal switching performance of the SOI MESFETs for buck converter applications in extreme environments.


Grant
Agency: National Aeronautics and Space Administration | Branch: | Program: SBIR | Phase: Phase II | Award Amount: 625.91K | Year: 2011

We have developed a low dropout (LDO) regulator using a patented MESFET transistor technology that can be manufactured in commercial CMOS foundries with no changes to the process flow. The regulator is stable under all load conditions without an external compensation capacitor, thereby reducing the mass/volume of the power management system and increasing reliability. The MESFET-based LDO component has very competitive figures of merit (dropout voltage, transient response, power supply rejection) compared to existing components. During Phase 1 we confirmed that the components were unconditionally stable without an external compensation capacitor over the temperature range -196C to +150C and for radiation doses up to 1 Mrad(Si). We shall build on the Phase 1 design effort to demonstrate two fully integrated LDO regulators rated up to 1A with dropout voltages of less than 50 mV. One part will be fabricated using a qualified rad-hard SOI CMOS foundry in collaboration with Honeywell, one of our commercialization partners. The other component will be fabricated using the low-cost/high-volume foundry available from IBM. Both parts will have a nominal output voltage of 1.8V with 1% accuracy. Other designs will target user adjustable voltages in the range 1.2-2V. The feasibility of using the MESFET technology for low voltage applications (e.g. 0.8V) will be explored. All parts will be tested over the temperature range -150C to +150C and after irradiation exposure to a TID of 1 Mrad from a Co-60 source. The enhanced low dose rate sensitivity (ELDRS) of the components will be studied using a low dose rate Cs-137 source. The characteristics of all the components will be documented, and parts made available to NASA and potential customers as deliverables from the Phase 2 activity. We shall work with our commercialization partners to have the LDO regulator design adopted as a licensed 'IP block' and to develop low cost versions for the wider consumer electronics market.


Grant
Agency: Department of Defense | Branch: Defense Advanced Research Projects Agency | Program: STTR | Phase: Phase II | Award Amount: 730.63K | Year: 2010

Voltage compliant metal-semiconductor field-effect-transistors (MESFETs) provide solutions to critical problems arising from the reduced operating voltage of highly scaled CMOS. This Phase 2 activity will develop MESFET based circuitries that allow high voltage applications to coexist on future, highly scaled low voltage CMOS applications. Our patented MESFET technology will be used to develop both RF and DC applications with a focus on RF power conversion, DC power management and driver applications. Our first objective is to develop high efficiency power amplifiers (PAs) for ultra-low power RF transceivers. As the supply voltage is reduced, resistive losses in the power amplifier limit its overall RF power conversion efficiency. Phase 2 will demonstrate a fully integrated PA module for system-on-a-chip transceiver applications that take advantage of the MESFETs high voltage capability to eliminate these problems. The second objective is to demonstrate low dropout (LDO) linear regulators for RF transceivers. The MESFET LDOs will have greater load stability, smaller silicon area and faster settling time compared to existing p-channel CMOS designs. We shall partner with Honeywell and Jazz Semiconductor during Phase 2 to demonstrate the MESFET circuits using advanced SOI CMOS technologies. These collaborations will be further developed for Phase 3 Commercialization activities.


Lepkowski W.,Sjt Micropower Inc | Wilk S.J.,Sjt Micropower Inc | Parsi A.,Arizona State University | Saraniti M.,Arizona State University | And 2 more authors.
Solid-State Electronics | Year: 2014

Metal-semiconductor field-effect-transistors (MESFETs) have been manufactured using a highly scaled 45 nm silicon-on-insulator (SOI) CMOS technology. The MESFETs display a reversible, soft breakdown at voltages greatly exceeding that of the standard CMOS devices. The breakdown voltage increases with the length of the access region between the MESFET channel and drain contact. The measured breakdown voltage is well described by a simple model based on avalanche multiplication. © 2013 Elsevier Ltd. All rights reserved.

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