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Park M.,Maxim Integrated | Perrott M.H.,SiTime Corporation | Staszewski R.B.,Technical University of Delft
IEEE Transactions on Circuits and Systems II: Express Briefs | Year: 2010

We propose a time-domain technique that significantly improves resolution of an RF digital-to-analog converter (RF-DAC). As an alternative to resorting to various resolution improvement attempts in the amplitude domain or through quantization noise shaping, pulsewidth modulation (PWM) of a single least significant bit device is employed with fine timing accuracy easily afforded by advanced CMOS technology. The technique is examined in the context of a commercial Enhanced Data rates for GSM Evolution (EDGE) polar transmitter realized in 65-nm CMOS, which employs an amplitude modulator with basic 10-bit amplitude resolution limited by the RF-DAC switching device mismatches. Behavioral simulations include realistic device mismatches and show worst-case resolution improvement of 2.2 bits assuming 20-ps worst-case time granularity of the PWM signal controls. © 2006 IEEE.

Park M.,Massachusetts Institute of Technology | Park M.,Maxim Integrated | Perrott M.H.,SiTime Corporation
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium | Year: 2010

A VCO-based RF modulator employing multiphase Pulse Width Modulation (PWM) is presented. The proposed RF modulator encodes the baseband signal into a set of multiphase PWM signals which are generated by a VCO-based opamp. The use of PWM avoids broadband quantization noise which is produced by ΣΔ modulation used in other RFDAC-based modulators. The prototype IC is fabricated in a 45nm CMOS process, consumes 54.3 mW, and has an active area of 0.126 mm 2. The measured results satisfy the 802.11g WLAN spectral mask, and EVM for 10-MHz, 64 QAM OFDM at 2.4 GHz is -30 dB. © 2010 IEEE.

Salvia J.C.,Stanford University | Melamud R.,SiTime Corporation | Chandorkar S.A.,Stanford University | Lord S.F.,Naval Nuclear Power School | Kenny T.W.,Stanford University
Journal of Microelectromechanical Systems | Year: 2010

We present a new temperature compensation system for microresonator-based frequency references. It consists of a phase-locked loop (PLL) whose inputs are derived from two microresonators with different temperature coefficients of frequency. The resonators are suspended within an encapsulated cavity and are heated to a constant temperature by the PLL controller, thereby achieving active temperature compensation. We show repeated real-time measurements of three 1.2-MHz prototypes that achieve a frequency stability of ± 1 ppm from-20° C to +80°C, as well as a technique to reduce steady-state frequency errors to ±0.05 ppm using multipoint calibration. © 2006 IEEE.

Perrott M.H.,SiTime Corporation
Analog Circuit Design - Robust Design, Sigma Delta Converters, RFID | Year: 2011

This chapter examines the use of VCO-based quantization within continuous-time, Sigma-Delta ADC circuits. We consider the VCO-based quantizer as an efficient combination of a voltage-to-time converter and a time-to-digital converter, and discuss the advantages it offers in achieving improved quantization noise performance in the ADC. However, the common approach of using frequency as the output of the VCO-based quantizer presents a bottleneck to achieving high SNDR in the ADC due to Kv nonlinearity. We show that using phase as the key output variable removes this nonlinearity barrier. Measured results confirm that 78 dB SNDR performance is achievable with 20 MHz bandwidth while achieving a 330 fJ/conversion step efficiency. © 2011 Springer Science+Business Media B.V.

SiTime Corporation | Date: 2015-01-15

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure.

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