Totsuka, Japan


Totsuka, Japan
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Navarro D.,Hiroshima University | Tone A.,Hiroshima University | Kikuchihara H.,Hiroshima University | Morikawa Y.,Silvaco Japan | Miura-Mattausch M.,Hiroshima University
Japanese Journal of Applied Physics | Year: 2017

Miller plateau characteristics of a 4H-SiC insulated-gate bipolar transistor (IGBT) is investigated during a gate voltage turn-on under the presence of interface carrier traps at the MOSFET gate oxide. The plateau, which is observed in the device gate-emitter voltage, increased with respect to both height and length. The plateau height is mainly determined by the density increase of trap states, which also causes slow charging of the gate capacitance in the overlap region that results in a longer plateau length. The shallow trap states contribute mainly to the plateau increase. It is observed that the switching loss at turn-on can increase by more than 60% due mainly to the carrier traps at the shallow trap states. © 2017 The Japan Society of Applied Physics.

Hayashi Y.,Toyota Technological Institute | Li D.,Silvaco Japan | Ogura A.,Meiji University | Ohshita Y.,Toyota Technological Institute
IEEE Journal of Photovoltaics | Year: 2013

The dependence of solar cell parameters on i-aSi:H (non-or lightly-doped hydrogenated amorphous silicon) layer thickness in an aSi:H/cSi (crystalline silicon) heterojunction solar cell was analyzed using numerical simulation. By considering the quantum confinement effect at interfaces between i-aSi:H and cSi, experimental data which had not been explained by simulation could be successfully interpreted. The mechanism of an open-circuit voltage increase was visually presented by analyzing carrier distributions and quasi-Fermi levels near cSi surfaces and in the i-aSi:H layers. The optimized thicknesses of the i-aSi:H layers in both front and rear junctions were suggested to obtain the maximum conversion efficiency. The influences of the quantum confinement effect on the simulation results were discussed. © 2011-2012 IEEE.

Navarro D.,Silvaco Japan | Pesic I.,Silvaco Japan | Pesic I.,Hiroshima University | Morikawa Y.,Silvaco Japan | And 2 more authors.
Japanese Journal of Applied Physics | Year: 2016

The dynamic characteristics of a 4H-SiC insulated-gate bipolar transistor (IGBT) at pulse switching is investigated by incorporating reported measurements of the interface defect density to device simulation. Different trap features such as energy states and trap time constants are investigated to determine the influence of traps on circuit performance. The capture cross-section parameter used in the simulation depicts the probability of traps to trap/detrap carriers which relates to the carrier trap time constant. It is demonstrated that trapped carriers from the on-state condition cause enhanced generation current during the off-state condition, which give rise to undesired leakage current in addition to the threshold voltage shift previously reported. The device power dissipation is increased by a factor of 100 due to the defects. © 2016 The Japan Society of Applied Physics.

Pesic I.,Hiroshima University | Navarro D.,SILVACO Japan | Miyake M.,Hiroshima University | Miura-Mattausch M.,Hiroshima University
Solid-State Electronics | Year: 2014

Previously reported measurements of the interface state density at the 4H-SiC/SiO2 interface and carrier recombination in the SiC substrate are incorporated into the device simulation of a 4H-SiC IGBT trench-type device structure. Cross-sectional simulation results show two important degradation characteristics on the conduction current; shift of the threshold voltage toward higher gate voltages due to the deep traps and reduction of the current magnitude due to the shallow traps. The wide bandgap of SiC and the high interface defect density magnitude distributed widely within the bandgap due to conventional SiC/SiO2 process technology make SiC-based devices prone to degradation, which are observed not only as a subthreshold-slope degradation but also causes variations of the threshold voltage. Conventional Si process technology usually results in a dominating homogeneous shallow-type trap which only results in a degradation of the subthreshold-slope. © 2014 Elsevier Ltd. All rights reserved.

Pesic I.,Hiroshima University | Navarro D.,Silvaco Japan | Fujinaga M.,Silvaco Japan | Furui Y.,Silvaco Japan | Miura-Mattausch M.,Hiroshima University
Japanese Journal of Applied Physics | Year: 2015

The switching characteristics of a trench-type 4H-SiC insulated-gate bipolar transistor (IGBT) device with interface defects are analyzed up to the nonquasi-static (NQS) switching regime using reported interface density measurements and device simulation. Collector current degradation characterized by threshold voltage shift to higher gate voltages and reduction of current magnitude due to carrier trapping are observed under quasi-static (QS) simulation condition. At slow switching of the gate voltage, carrier trapping causes a hump in the transient current at the start of conduction. At very fast switching, the current hump is limited by the NQS effect which results to a reduced switching efficiency and increased onresistance. © 2015 The Japan Society of Applied Physics.

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