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Grant
Agency: European Commission | Branch: H2020 | Program: ECSEL-IA | Phase: ECSEL-02-2014 | Award Amount: 48.05M | Year: 2015

The goal of the InForMed project is to establish an integrated pilot line for medical devices. The pilot line includes micro-fabrication, assembly and even the fabrication of smart catheters. The heart of this chain is the micro-fabrication and assembly facility of Philips Innovation Services, which will be qualified for small/medium-scale production of medical devices. The pilot facility will be open to other users for pilot production and product validation. It is the aim of the pilot line: to safeguard and consolidate Europes strong position in traditional medical diagnostic equipment, to enable emerging markets - especially in smart minimally invasive instruments and point-of-care diagnostic equipment - and to stimulate the development of entirely new markets, by providing an industrial micro-fabrication and assembly facility where new materials can be processed and assembled. The pilot line will be integrated in a complete innovation value chain from technology concept to high-volume production and system qualification. Protocols will be developed to ensure an efficient technology transfer between the different links in the value chain. Six challenging demonstrators products will be realized that address societal challenges in: Hospital and Heuristic Care and Home care and well-being, and demonstrate the trend towards Smart Health solutions.


Grant
Agency: European Commission | Branch: H2020 | Program: RIA | Phase: ICT-02-2014 | Award Amount: 8.22M | Year: 2014

Smart-MEMPHIS project addresses the increasing demand for low-cost, energy-efficient autonomous systems by focusing on the main challenge for all smart devices - self-powering. The project aims to design, manufacture and test a miniaturized autonomous energy supply based on harvesting vibrational energy with piezo-MEMS energy harvesters. The project will integrate several multi-functional technologies and nanomaterials; lead-zirconate-titanate materials in MEMS-based multi-axis energy harvester, an ultra-low-power ASIC to manage the variations of the frequency and harvested power, a miniaturized carbon-nano material based energy storing supercapacitor, all heterogeneously integrated with new innovative flat panel packaging technologies for cost effective 3D integration verified through manufacturability reviews. The performance of the system will be demonstrated in two demanding applications: leadless bio-compatible cardiac pacemaker and wireless sensor networks (WSN) for structure health monitoring (SHM). For the pacemaker, a smart energy autonomous system will accelerate the paradigm shift from costly, burdensome surgical treatments to cost-effective and patient-friendly minimally invasive operations enabled by leadless pacemakers capable of harvesting energy from the heart beats. The key challenges for the energy harvesting arise from the extremely stringent reliability requirements, the low vibrational energies and frequencies and the small size required for a device implanted inside a heart. With the 2nd demonstrator the consortium consisting of multi-functional value chain will show a wider applicability for the technologies complementing the medical application. A WSN with acoustic sensor nodes will be demonstrated in SHM applications. SHM enables real-time monitoring of complex structures e.g. survey and detection of micro-cracks for example in composite aircraft wings, bridges or rails, or detection of corrosion or leakage in pipes solving.


Patent
Silex Microsystems | Date: 2013-10-31

Method of making through-substrate-vias in glass substrates includes providing a first substrate on which a plurality of needles protruding vertically from the substrate are made; providing a second substrate made of glass; locating the substrates adjacent each other such that the needles on the first substrate face the second substrate; applying heat to a temperature where the glass softens, by heating the glass or the needle substrate or both; applying a force such that the needles on the first substrate penetrate into the glass to provide impressions in the glass; and finally, removing the first substrate and providing material filling the impressions in the second substrate made of glass. A device includes a silicon substrate having a cavity in which a MEMS component is accommodated, and a cap wafer made of a material having a low dielectric constant, and through substrate vias of metal, is bonded to the silicon substrate.


Patent
Silex Microsystems | Date: 2013-11-06

A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro- mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.


The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.


Patent
Silex Microsystems | Date: 2013-06-12

A semiconductor device, includes a semiconductor substrate (10) having a first (12a) and a second (12b) side. There is provided at least one via (15) extending through the substrate (10) having first (16a) and second (16b) end surfaces, the first end surface (16a) constituting a transducer electrode for interacting with a movable element (14) arranged at the first side (12a) of the substrate (10). A shield (17) is provided on and covers at least part of the first side (12a) of the substrate (10), the shield/mask (17) including a conductive layer (19a) and an insulating material layer (19b) provided between the substrate (10) and the conductive layer (19a). The mask has an opening (18) exposing only a part of the first surface (16a) of the via. Preferably the opening (18) in the mask is precisely aligned with the movable element, and the area of the opening is accurately defined.


Patent
Silex Microsystems | Date: 2016-02-10

A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, includes providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectiveley deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited on the Ni by a plating process. Line widths and spacings<10 m are provided on both sides of the wafer.


Patent
Silex Microsystems | Date: 2013-04-15

The present interposer makes it possible to tailor the coefficient of thermal expansion of the interposer to match components to be attached thereto within very wide ranges. The semiconductor interposer, includes a substrate of a semiconductor material having a first side and an opposite second side. There is at least one conductive wafer-through via including metal. At least one recess is provided in the first side of the substrate and in the semiconductor material of the substrate, the recess being filled with metal and connected with the wafer-through via providing a routing structure. The exposed surfaces of the metal-filled via and metal-filled recess are essentially flush with the substrate surface on the first side of the substrate. The wafer-through via includes a narrow part and a wider part, and contact elements are provided on the routing structure having an aspect ratio, height:diameter, <1:1, preferably 1:1 to 2:1.


Patent
Silex Microsystems | Date: 2014-08-26

A device includes a base substrate (700) with a micro component (702) attached thereto. Suitably it is provided with routing elements (704) for conducting signals to and from the component (702). It also includes spacer members (706) which also can act as conducting structures for routing signals vertically. There is a capping structure (708) of a glass material, provided above the base substrate (700), bonded via the spacer members (706), preferably by eutectic bonding, wherein the capping structure (708) includes vias (710) including metal for providing electrical connection through the capping structure. The vias can be made by a stamping/pressing method entailing pressing needles under heating to soften the glass and applying pressure, to a predetermined depth in the glass. However, other methods are possible, e-g- drilling, etching, blasting.


Patent
Silex Microsystems | Date: 2016-01-12

A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer. Finally the wafer is singulated to individual devices.

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