Shinko Electrical Industries Co

Nagano-shi, Japan

Shinko Electrical Industries Co

Nagano-shi, Japan

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Patent
SHINKO Electrical INDUSTRIES CO. | Date: 2016-11-03

A wiring substrate including an insulation layer, a connection terminal projecting from an upper surface of the insulation layer, a protective insulation layer formed on the upper surface of the insulation layer covering a lower side surface of the connection terminal, and a cover layer covering an upper side surface and an upper surface of the connection terminal exposed from the protective insulation layer. The protective insulation layer includes an upper surface defining a protrusion bulged upward around the connection terminal. The protrusion includes a peak, a first slope inclined downward from the peak and extending toward the connection terminal, and a second slope inclined downward from the peak and extending away from the connection terminal. The cover layer further covers the first slope, the peak, and a part of the second slope.


Patent
SHINKO Electrical INDUSTRIES CO. | Date: 2016-10-20

A wiring substrate includes first through holes extending through an insulation layer, first via wirings formed in the first through holes, a conductive pattern connected to the first via wirings, recesses formed in the first via wirings, and a protective insulation layer covering the conductive pattern and the first via wirings. The first via wirings, the conductive pattern, the recesses, and the protective insulation layer form an identification mark identifiable as a particular shape including a character or a symbol. Each recess is defined by an upper surface of the corresponding first via wiring and includes a curved side wall and a bottom wall that is located at a lower position than an upper surface of the conductive pattern. The protective insulation layer is thicker over the first via wirings than over the conductive pattern.


Patent
SHINKO Electrical INDUSTRIES CO. and Japan Electronic Materials Corporation | Date: 2016-11-21

A probe guide plate includes: a silicon substrate including one surface and the other surface opposite to the one surface; a through hole formed through the silicon substrate to extend from the one surface of the silicon substrate to the other surface of the silicon substrate; a silicon oxide layer formed on the one surface of the silicon substrate, the other surface of the silicon substrate, and an inner wall surface of the through hole; and a protective insulating layer formed on the silicon oxide layer. The protective insulating layer is formed on at least one of the one surface and the other surface of the silicon substrate via the silicon oxide layer, and partially formed on the inner wall surface of the through hole via the silicon oxide layer.


Patent
SHINKO Electrical INDUSTRIES CO. | Date: 2016-11-18

A wiring substrate includes a first insulation layer covering a first wiring layer, a wiring pattern formed on an upper surface of the first insulation layer, and a via formed in a via hole of the first insulation layer to electrically connect the wiring pattern and the first wiring layer. The via includes a via seed layer and a filled portion filling the via hole. The wiring pattern includes a wiring seed layer formed on the upper surface of the first insulation layer and a pattern layer formed on the wiring seed layer. The via seed layer is formed from a metal acting to adsorb a plating enhancement agent, which enhances formation of the filled portion and the pattern layer in an electrolytic plating solution. The wiring seed layer is formed from a metal not acting to adsorb the plating enhancement agent as compared to the via seed layer.


Patent
SHINKO Electrical INDUSTRIES CO. | Date: 2017-01-06

A lead frame includes a first lead frame including a first lead; a second lead frame including a second lead, the second lead frame being stacked on the first lead frame so that a space is formed between the first lead frame and the second lead frame, and the second lead being bonded to the first lead; and a resin portion provided in the space formed between the first lead frame and the second lead frame, wherein each of the first lead and the second lead includes an embedded portion embedded in the resin portion, and a protruding portion protruded from the resin portion, and wherein the embedded portion of the first lead and the embedded portion of the second lead are bonded in the resin portion.


Patent
SHINKO Electrical INDUSTRIES CO. and Japan Electronic Materials Corporation | Date: 2017-01-12

A probe guide plate includes a first silicon substrate having first through-holes formed therein, an insulation layer formed on the first silicon substrate and having an opening on a region in which the first through-holes are arranged, a second silicon substrate arranged on the insulation layer and having second through-holes formed at positions corresponding to the first through-holes, and a silicon oxide layer formed on exposed surfaces of the first silicon substrate and the second silicon substrate.


Patent
SHINKO Electrical INDUSTRIES CO. and Japan Electronic Materials Corporation | Date: 2017-01-17

A probe guide plate includes a first silicon substrate, a first recess portion formed in an upper surface of the first silicon substrate, first through-holes formed in the first silicon substrate at a bottom of the first recess portion, a second silicon substrate directly bonded on the first silicon substrate, a second recess portion formed to face the first recess portion in a lower surface of the second silicon substrate, and second through-holes formed in the second silicon substrate at a bottom of the second recess portion and arranged to correspond to the first through-holes, A notch portion is formed at an upper end portion of an inner wall of each of the first through-holes of the first silicon substrate.


Patent
SHINKO Electrical INDUSTRIES CO. | Date: 2017-02-06

A wiring substrate includes a core substrate and a cavity extending through the core substrate. The cavity has a planar shape that is rectangular, and includes corners and sides connecting the corners in a plan view. The wiring substrate also includes first through holes that extend through the core substrate and are spaced apart from the cavity. An electronic component is arranged in the cavity. The wiring substrate also includes a first insulating material with which the first through holes are filled and a second insulating material with which a gap between the electronic component and walls of the cavity is filled. The first through holes are arranged around the corners of the cavity in a plan view. Each of the first through holes is L-shaped in a plan view and formed continuously along two of the sides of the cavity that define the corresponding corner.


Patent
SHINKO Electrical INDUSTRIES CO. | Date: 2017-01-19

An electronic component integrated substrate includes a first substrate including a first pad, a first solder resist layer provided with a first open portion that selectively exposes the first pad, and a connection pad formed on the first solder resist layer, and electrically connected to the first pad; a second substrate, stacked on the first substrate, including a second pad, and a second solder resist layer formed on the second pad and provided with a second open portion that selectively exposes the second pad; an electronic component mounted on the first substrate and sandwiched between the first substrate and the second substrate; and a substrate connection member that electrically connects the connection pad and the second pad with each other, the diameter of the connection pad being larger than each of the diameter of the first pad and the diameter of the second open portion.


Patent
Shinko Electrical Industries Co. | Date: 2017-01-24

A semiconductor device includes a wiring substrate including an upper surface on which a component pad and a connection pad are formed, an electronic component connected to the component pad, a conductive connection member connected to the connection pad, an encapsulation resin that encapsulates the electronic component and the connection member, and a wiring unit. The wiring unit includes a first pad, which is embedded in the encapsulation resin and electrically connected to the connection member, and a second pad, which includes an external device connection surface located at a higher position than an upper surface of the encapsulation resin. At least one of the first pad and the second pad includes a side surface that is curved so that the curved side surface widens outwardly toward the upper surface of the encapsulation resin.

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