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Horten, Norway

Keller C.,Infineon Technologies | Tus S.,SensoNor AS
Microelectronics Reliability | Year: 2010

In this case study we present the failure analysis flow of a MEMS device. Because of the combination of a MEMS sensor and ASIC die within one package (system in package) new materials are used. This causes new failure modes and creates particular failure analysis challenges. In this particular case study, contamination due to glob top on the ASIC die causes reliability problems. The change of mechanical stress within the package then leads to open bonds causing functional fails in the field application. To determine the root cause of the problem multiple steps of selective decapsulation are necessary as shown in this study in detail. © 2010 Elsevier Ltd. All rights reserved. Source

Schroder S.,KTH Royal Institute of Technology | Nafari A.,Acreo Ab | Persson K.,Acreo Ab | Westby E.,SensoNor AS | And 4 more authors.
2013 Transducers and Eurosensors XXVII: The 17th International Conference on Solid-State Sensors, Actuators and Microsystems, TRANSDUCERS and EUROSENSORS 2013 | Year: 2013

This paper presents a packaging approach for inertial sensors using wire bonding technology. The die is mounted exclusively by bond wires on the front- and backside to the package. Conventional single-side die attach to substrates, such as gluing, is abandoned. The approach is characterized by its novel and symmetric die attach concept as well as its simplicity of applying a standard wire bonding process. The wire bond attachment facilitates significant reduction of thermally induced mechanical stresses. The attachment concept is characterized in terms of attachment stiffness and potential die resonances using Laser Doppler Vibrometry (LDV). White-light interferometry is used to investigate stress related warping that is induced by the die attachment process. © 2013 IEEE. Source

SensoNor AS | Date: 2011-04-15

A micro-electromechanical system (MEMS) structure for an angular rate sensor, the structure being positioned between first and second silicon-insulator composite wafers formed of a plurality of structured silicon parts, electrically isolated from each other by an insulator material, the structure comprising: a mono-crystalline silicon substrate structured to form a sensing system and a frame, the sensing system being completely de-coupled from and surrounded by the frame, which is positioned between engaging surfaces of the first and second composite wafers such that the sensing system is hermetically sealed within a cavity defined by the first and second composite wafers and the frame, the sensing system including: two seismic masses having front and back surfaces; two driving beams, each having a first end attached to a seismic mass and a second end attached to the first and second composite wafers by means of fixed pedestals provided on the silicon substrate; and a bending spring arranged to directly connect between, and synchronise a primary motion of, the two seismic masses, each of the seismic masses being arranged to have a first degree of rotational freedom about an axis that is substantially perpendicular to the plane of the silicon substrate, and the seismic masses and driving beams being arranged to have a second degree of rotational freedom about an axis substantially coincident with the longitudinal axis of the driving beams; means for generating and detecting the primary motion consisting of a primary oscillation of the two seismic masses, in opposing phases, in the first degree of rotational freedom; and means of detecting a secondary motion consisting of a secondary oscillation of the two seismic masses, in opposing phases, in the second degree of rotational freedom, the means of generating and detecting the primary motion and the means of detecting a secondary motion being provided on both the front and back surfaces of each of the first and second seismic masses, wherein the sensing system is arranged such that, when the device is subjected to an angular velocity around a third axis that is substantially in the plane of the silicon substrate and perpendicular to the longitudinal axis of the beams, a Coriolis force arises which causes the secondary oscillation of the seismic masses.

Forsberg F.,KTH Royal Institute of Technology | Lapadatu A.,SensoNor AS | Kittilsland G.,SensoNor AS | Martinsen S.,SensoNor AS | And 11 more authors.
IEEE Journal on Selected Topics in Quantum Electronics | Year: 2014

We demonstrate infrared focal plane arrays utilizing monocrystalline silicon/silicon-germanium (Si/SiGe) quantum-well microbolometers that are heterogeneously integrated on top of CMOS-based electronic read-out integrated circuit substrates. The microbolometers are designed to detect light in the long wavelength infrared (LWIR) range from 8 to 14 μm and are arranged in focal plane arrays consisting of 384 × 288 microbolometer pixels with a pixel pitch of 25 μm × 25 μm. Focal plane arrays with two different microbolometer designs have been implemented. The first is a conventional single-layer microbolometer design and the second is an umbrella design in which the microbolometer legs are placed underneath the microbolometer membrane to achieve an improved pixel fill-factor. The infrared focal plane arrays are vacuum packaged using a CMOS compatible wafer bonding and sealing process. The demonstrated heterogeneous 3-D integration and packaging processes are implemented at wafer-level and enable independent optimization of the CMOS-based integrated circuits and the microbolometer materials. All manufacturing is done using standard semiconductor and MEMS processes, thus offering a generic approach for integrating CMOS-electronics with complex miniaturized transducer elements. © 2014 IEEE. Source

Van De Wiel H.J.,TNO | Vardoy A.-S.B.,Sintef | Hayes G.,TNO | Fischer H.R.,TNO | And 2 more authors.
2012 4th Electronic System-Integration Technology Conference, ESTC 2012 | Year: 2012

A flux-less copper-tin (Cu-Sn) solid-liquid inter-diffusion (SLID) bonding process, providing a cost-effective hermetic vacuum sealing at wafer-level, has been investigated. Observations have been made indicating that the storage time of Cu-Sn plated wafers before bonding is critical with regard to voiding. Growth of the intermediately formed intermetallic compound (IMC), Cu 6Sn5, was investigated as a possible cause. Room temperature aging of Cu-Sn plated wafers prior to bonding was performed as well as annealing of un-bonded Cu-Sn plated wafers. The presence of large Cu 6Sn5 and Cu3Sn crystallites which nearly depleted the Sn was observed by optical microscopy after annealing. If large Cu6Sn5 grains from opposite contact planes meet at the bond interface, voids are predicted to be formed during the subsequent stages of liquid inter-diffusion and solidification. Implications on the Cu-Sn bonding strategy based on the results are presented. Source

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