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Hutchby J.A.,Semiconductor Research Corporation
Renewable and Sustainable Energy Reviews | Year: 2014

The photovoltaics industry has made steady progress over the past 40 years toward increasing solar cell and module efficiencies while incrementally lowering the initial installed cost of photovoltaic systems. These two factors dominate in lowering the cost of solar electric energy (in ¢/(kW-h)) as it approaches parity in cost with electric energy produced conventionally using coal, nuclear, or natural gas. An interesting question regards whether there is a relationship that describes the evolution of photovoltaics Levelized Cost of Energy (LCOE) similar to Moore's Law characterization of microelectronics evolution of transistor size and density. With some caveats, we believe a similar PV relationship can be defined; the purpose of this paper is to propose and discuss a basis for this relationship. To achieve parity the installed cost of PV systems needs to be reduced by 50% from approximately $600/m 2 to $300/m2 with a concurrent increase in c-Si module efficiency to 24% AM1.5. The trajectories in time needed to drive a technology roadmap for lowering the installed cost and for increasing the module efficiency to achieve parity are discussed. Also, a new methodology for calculating LCOE for PV systems is proposed and discussed in Appendix. © 2013 Elsevier Ltd. Source


Herr D.J.C.,Semiconductor Research Corporation
Journal of Materials Research | Year: 2011

This paper provides an overview of directed self-assembly (DSA) options that exhibit potential for enabling extensible high-volume patterning of nanoelectronics devices. It describes the current set of research requirements, which a DSA technology must satisfy to warrant insertion consideration, and summarizes the state-of-the art. The primary focus is on chemical patterning and graphoepitaxial approaches to directing block copolymer (BCP) based assembly. These options exhibit the nearest-term potential, among the emerging DSA technologies, for satisfying projected International Technology Roadmap for Semiconductors (ITRS) patterning requirements. The paper concludes with a selected set of additional challenges, which represent potential barriers to the integration of directed BCP patterning into a nanoelectronics manufacturing line, as well as a few emerging application opportunities for related functional materials. A glossary of acronyms and terms may be found at the end of this manuscript. © Materials Research Society 2011. Source


Joyner W.H.,Semiconductor Research Corporation
IEEE Design and Test | Year: 2014

Design Automation Conference in 1964, papers were typed on typewriters, and tools were described as working on designs of arbitrary size, so long as there were no more than 20 transistors. Today, while we handle many more characteristics of much larger designs, some of the challenges and insights from those early days are still remarkably relevant. The keynote speaker, August Bolino, was from the US Department of Labor, and discussed displacement of workers and an increase in employment opportunities, both the results of automation. The design automation industry was described as having grown from a searching infancy to a rapidly maturing adolescence as a result of increasing effort throughout industry. The growth of the Design Automation Conference, the new companies appearing at DAC each year, and the propagation of design automation techniques into related areas, indicates that growth is still happening today, and that the partnership forged in the field, and at DAC, between universities, tool users, and tool providers is a growing and successful model which other fields strive to emulate. Source


Patent
Semiconductor Research Corporation | Date: 2013-03-15

A depletion-mode phototransitor is disclosed. The phototransistor having a substrate, a gate, a source, a drain and a channel. The source, drain and channel are doped to be the same type of semiconductor. The substrate can be made of silicon and/or germanium. The gate can be made of either aluminum or polysilicon.


Cavin R.K.,Semiconductor Research Corporation | Lugli P.,Semiconductor Research Corporation | Zhirnov V.V.,Ludwig Maximilians University of Munich
Proceedings of the IEEE | Year: 2012

One of the remarkable technical achievements of the past 40 years has been the advances in complexity of the integrated circuit, driven primarily by an exponential rate of reduction in transistor feature sizes, thereby enabling the creation of electronic systems with steadily increasing functionality. The societal benefits in terms of economic growth from Moore's law scaling depend on a knowledge of learning curve cost reductions enabled by Moore's law. It might be possible to increase design efficiency to reduce nonrecurring engineering costs or to develop more cost-effective packaging technologies. The basic physics upon which a transistor operates might be altered 'to utilize other physical phenomena, such as electron spin, magnetic dipoles, photons, etc., to develop new classes of devices that would preserve Moore's law benefits. Source

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