Austin, TX, United States
Austin, TX, United States

SEMATECH is a not-for-profit consortium that performs research and development to advance chip manufacturing. SEMATECH has broad engagement with various sectors of the R&D community, including chipmakers, equipment and material suppliers, universities, research institutes, and government partners. The group is funded by member dues. Wikipedia.


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Patent
New York University and Sematech | Date: 2016-10-20

Methods and compositions are provided for reducing or eliminating charge buildup during scanning electron microscopy (SEM) metrology of a critical dimension (CD) in a structure produced by lithography. An under layer is utilized that comprises silicon in the construction of the structure. When the lithography structure comprising the silicon-comprising under layer is scanned for CDs using SEM, the under layer reduces or eliminates charge buildup during SEM metrological observations.


Patent
Sematech and Asahi Glass Co. | Date: 2014-05-08

A process for cleaning and restoring deposition shield surfaces which results in a cleaned shield having a surface roughness of between about 200 microinches and about 500 microinches and a particle surface density of less than about 0.1 particles/mm^(2 )of particles between about 1 micron and about 5 microns in size and no particles less than about 1 micron in size and method for use thereof is disclosed.


Patent
Sematech and Asahi Glass Co. | Date: 2014-05-08

A deposition chamber shield having a stainless steel coating of from about 100 microns to about 250 microns thick wherein the coated shield has a surface roughness of between about 300 microinches and about 800 microinches and a surface particle density of less than about 0.1 particles/mm^(2 )of particles between about 1 micron and about 5 microns in size and no particles below about 1 micron in size, and process for production thereof is disclosed.


Patent
Tokyo Electron and Sematech | Date: 2015-05-14

A germanium-containing semiconductor device and a method for forming a germanium-containing semiconductor device are described. The method includes providing a germanium-containing substrate, depositing a silicon-containing interface layer on the germanium-containing substrate, depositing an aluminum-containing diffusion barrier layer on the silicon-containing interface layer, and depositing a high-k layer on the aluminum-containing diffusion barrier layer. The germanium-containing semiconductor device includes a germanium-containing substrate, a silicon-containing interface layer on the germanium-containing substrate, an aluminum-containing diffusion barrier layer on the silicon-containing interface layer, and a high-k layer on the aluminum-containing diffusion barrier layer.


Patent
Sematech and New York University | Date: 2014-01-17

Methods and compositions are provided for reducing or eliminating charge buildup during scanning electron microscopy (SEM) metrology of a critical dimension (CD) in a structure produced by lithography. An under layer is utilized that comprises silicon in the construction of the structure. When the lithography structure comprising the silicon-comprising under layer is scanned for CDs using SEM, the under layer reduces or eliminates charge buildup during SEM metrological observations.


An apparatus, system, and method for cleaning surfaces is presented. One embodiment of the system includes an array of surface acoustic wave (SAW) transducers coupled to a substrate. The system may include a positioning mechanism coupled to at least one of a target surface or the array of SAW transducers, and configured to position the array of SAW transducers within an effective cleaning distance of a target surface. The system may also include a cleaning liquid supply arranged to provide cleaning liquid for coupling the array of SAW transducers to the target surface. The system may further include a controller coupled to the array of SAW transducers and configured to activate the array of SAW transducers. At least one of the SAW transducers may be formed to focus cleaning liquid on a focal point and jet cleaning liquid in a direction substantially out of the place of the SAW transducer.


Provided are methods for preparing a doped silicon material. The methods include contacting a surface of a silicon material with a dopant solution comprising a dopant-containing compound selected from a phosphorus-containing compound and an arsenic-containing compound, to form a layer of dopant material on the surface; and diffusing the dopant into the silicon material, thereby forming the doped silicon material, wherein the doped silicon material has a sheet resistance (R_(s)) of less than or equal to 2,000 /sq.


An apparatus is provided for protecting a surface of interest from particle contamination, and particularly, during transitioning of the surface between atmospheric pressure and vacuum. The apparatus includes a chamber configured to receive the surface, and a protector plate configured to reside within the chamber with the surface, and inhibit particle contamination of the surface. A support mechanism is also provided suspending the protector plate away from an inner surface of the chamber. The support mechanism holds the protector plate within the chamber in spaced, opposing relation to the surface to provide a gap between the protector plate and the surface which presents a diffusion barrier to particle migration into the gap and onto the surface, thereby inhibiting particle contamination of the surface.


Provided are methods of fabricating a semiconductor structure. The methods include providing a III-V semiconductor substrate selected from InGaAs and InAs, introducing an n-type dopant selected from S, Se, and Te directly onto a surface of the III-V semiconductor substrate, introducing a co-dopant selected from N and P directly onto a surface of the III-V semiconductor substrate, and diffusing the n-type and co-dopant into the III-V semiconductor substrate, thereby forming an n-doped III-V semiconductor substrate containing the n-type dopant and the co-dopant. The methods produce inventive semiconductor structures, and devices that include the semiconductor structure.


Patent
Sematech | Date: 2014-10-27

The present invention includes methods directed to improved processes for producing a monolayer of sulfur or selenium on the surface of a semiconductor. As a surface layer, it functions to passivate the surface; if annealed, it provides a doping element.

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