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Hu R.,Science and Technology on Analog Integrated Circuit Laboratory | Zhang X.,Sichuan Institute of Solid State Circuits
2015 International Conference on Optoelectronics and Microelectronics, ICOM 2015 | Year: 2015

A switch-decoded based current-steering architecture is proposed for calibration DAC of ADCs. The circuit and working principle of the proposed switch-decoded current-steering DAC is introduced. A 14-bit DAC is realized in 0.18um CMOS process by combining an 8-bit switch-decoded current-steering DAC with a 6-bit binary-weight DAC. The chip area taken by the 14-bit DAC is only 0.1 square millimeters. The simulation shows that the DNL is +0.18/-0.52LSB and the INL is +1.5/-2.3LSB. © 2015 IEEE. Source


Hu R.,Science and Technology on Analog Integrated Circuit Laboratory | Zhang X.,Sichuan Institute of Solid State Circuits
2015 International Conference on Optoelectronics and Microelectronics, ICOM 2015 | Year: 2015

A CMOS analog front end for ADCs is introduced, which can sample and hold the incoming analog signal for the following ADC. As a result, the ADC can deal with a signal which is unchanged at the working period of the ADC. The analog front is a full differential architecture including two completely symmetrical signal paths, which receive the normal and inverted phase parts of a full differential signal, respectively. The outputs of the two signal paths are inputted into the normal and inverted phase input terminals of a full differential amplifier. A protection is added to the circuit to speed up the sampling switch. A resistor is added to filter out the high frequency spur caused by the switching action of circuit. As a result, the proposed circuit has higher sampling rate and performances than other related sample and hold circuit. Simulation shows that the analog front consumes only 80mW power and has a SNR of 67dB as well as a SFDR of 70dB at a sampling rate of 2.4GSPS. © 2015 IEEE. Source


Hu R.,Sichuan Institute of Solid State Circuits | Tang J.,Chongqing University of Posts and Telecommunications | Tang J.,Science and Technology on Analog Integrated Circuit Laboratory
2012 2nd International Conference on Consumer Electronics, Communications and Networks, CECNet 2012 - Proceedings | Year: 2012

A novel bootstrapped switch is introduced in this paper At first, the mathematics built in the bootstrapped switch is discussed Secondly, the prototype of the bootstrapped switch is described. At last, the transistor-level circuit of the bootstrapped switch is given. The performance of the bootstrapped switch is tested indirectly by stimulating a sampling and holding circuit containing the bootstrapped switch. The stimulated results show that the bootstrapped switch has a performance with SFDR more than 89dBc, and SNR bigger than 79dB. © 2012 IEEE. Source


Hu R.,Sichuan Institute of Solid State Circuits | Tang J.,Chongqing University of Posts and Telecommunications | Tang J.,Science and Technology on Analog Integrated Circuit Laboratory
2012 2nd International Conference on Consumer Electronics, Communications and Networks, CECNet 2012 - Proceedings | Year: 2012

A novel full differential double sampling circuit is presented in the paper. The traditional full differential single sampling circuit is compared with the proposed full differential double sampling one to show that the latter has more efficiency and higher speed The proposed full differential double sampling circuit is designed in TSMC 0.18m CMOS process technology. The simulation results show that the SFDR of the proposed full differential double sampling circuit is 81.36dB at 200MS/s. Further simulations show that the proposed full differential double sampling circuit has twice better performance than the traditional one. © 2012 IEEE. Source


Ye R.K.,Sichuan Institute of Solid State Circuits | Hu R.B.,Science and Technology on Analog Integrated Circuit Laboratory
Advanced Materials Research | Year: 2014

A kind of CMOS bandgap reference circuit with high order temperature compensation is introduced [1]. Compared to the traditional circuit, the bandgap reference proposed here has several advantages such as better temperature stability, smaller chip area, lower power consumption, self power-on, and so on. Our design can be used in analog-to-digital or digital-to-analog converters, where high performance bandgap reference is required. © (2014) Trans Tech Publications, Switzerland. Source

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