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Patent
Realtek Semiconductor Corporation | Date: 2015-04-08

A memory controller is arranged for controlling the process of writing a page data to a memory, wherein the page data possesses a logical address. The memory controller includes a page buffer, a data pattern detector and a logical-physical address mapping table. The page buffer is used for buffering the page data. The data pattern detector is coupled to the page buffer, and used to detect whether the page data is a predetermined pattern, to generate a data pattern flag, and determine whether to write the page data to a physical address of the memory according to the data pattern flag. The logical-physical address mapping table is coupled to the data pattern detector, and is arranged for storing the data pattern flag and the logical address of the page data, and selectively generating and storing the physical address.


Patent
Realtek Semiconductor Corporation | Date: 2015-04-21

A circuit for generating a horizontal synchronizing signal of a display includes: a first comparator which is used to compare a luminance signal of a Component Video Connector of the display and a first reference signal to generate a compared signal; a control circuit which is used to generate a first digital controlled signal according to the compared signal; a first digital-to-analog converter which is used to generate the first reference signal according to the first digital controlled signal; a second digital-to-analog converter which is used to generate a second reference signal according to a second digital controlled signal generated by the control circuit, wherein the second digital controlled signal is determined by the first digital controlled signal; and a second comparator which is used to compare the luminance signal and the second reference signal to generate the horizontal synchronizing signal.


Patent
REALTEK SEMICONDUCTOR Corporation | Date: 2015-04-13

A Bluetooth remote control system and related transmitting-end Bluetooth device and receiving-end Bluetooth device are disclosed. The transmitting-end Bluetooth device includes: a Bluetooth transmitting circuit; a receiving interface configured to operably receive a user trigger signal; a packet generating circuit configured to operably insert a power on request into one or more predetermined advertising packets to form one or more target advertising packets; and a Bluetooth control circuit configured to operably control the Bluetooth transmitting circuit to transmit the one or more target advertising packets. Each of the predetermined advertising packets is an advertising indication (ADV_IND) packet, a non-connectable advertising indication (ADV_NONCONN_IND) packet, or a discoverable advertisement indication (ADV_DISCOVER_IND) packet.


Patent
REALTEK SEMICONDUCTOR Corporation | Date: 2015-04-13

A wireless communication system and related wireless devices are disclosed. The wireless communication system includes: a source wireless device configured to operably insert an auto-pairing request and one or more source Bluetooth device addresses into one or more predetermined advertising packets to form one or more target advertising packets, and configured to operably transmit the target advertising packets; and a destination wireless device configured to operably receive and parser the target advertising packets to extract the auto-pairing request and the one or more source Bluetooth device addresses. The destination wireless device performs an auto-pairing procedure with the source wireless device according to the auto-pairing request and the one or more source Bluetooth device addresses to establish a Bluetooth bond with the source wireless device. Each of the predetermined advertising packets is an advertising indication (ADV_IND) packet, a non-connectable advertising indication (ADV_NONCONN_IND) packet, or a discoverable advertisement indication (ADV_DISCOVER_IND) packet.


Patent
Realtek Semiconductor Corporation | Date: 2015-09-01

A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; a first voltage difference generating circuit coupled with two terminals of the first adjustable resistor to generate a first voltage difference value; a second voltage difference generating circuit coupled with two terminals of the second adjustable resistor to generate a second voltage difference value; sample-and-hold circuits for generating sampled signals according to the first voltage difference value and the second voltage difference value; a comparing circuit for comparing the sampled signals; and an adjusting circuit for adjusting resistance of the first and/or second adjustable resistors according to the comparing result.

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