Lund, Sweden
Lund, Sweden

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Patent
Qunano Ab | Date: 2016-09-02

The present invention provides a method and a system for forming wires (1) that enables a large scale process combined with a high structural complexity and material quality comparable to wires formed using substrate-based synthesis. The wires (1) are grown from catalytic seed particles (2) suspended in a gas within a reactor. Due to a modular approach wires (1) of different configuration can be formed in a continuous process. In-situ analysis to monitor and/or to sort particles and/or wires formed enables efficient process control.


Patent
Qunano Ab | Date: 2015-03-20

The present invention relates to nanostructured light emitting diodes, LEDs. The nanostructure LED device according to the invention comprises an array of a plurality of individual nanostructured LEDs. Each of the nanostructured LEDs has an active region wherein light is produced. The nanostructured device further comprise a plurality of reflectors, each associated to one individual nanostructured LED (or a group of nanostructured LEDs. The individual reflectors has a concave surface facing the active region of the respective individual nanostructured LED or active regions of group of nanostructured LEDs.


The invention regards a method of manufacturing a structure adapted to be transferred to a non-crystalline layer. The method comprises the steps of providing a substrate having a crystal orientation, providing a plurality of elongate nanostructures (nanowires) on said substrate, said nanostructures extending from the substrate such that the angle defined by the axis of elongation of each nanostructure and the surface normal of the substrate is smaller than 55 degrees, depositing at least one layer of material such that at least the exposed regions of the substrate are covered by said material, removing the substrate such that the deposited layer becomes lowermost layer and exposing at least the extremity of the respective nanostructure of the plurality of nanostructures. Invention also regards a structure manufactured using said method.


The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilized in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.


Patent
Qunano Ab | Date: 2014-07-03

The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.


Patent
Qunano Ab | Date: 2016-03-11

The present invention provides a method for aligning nanowires which can be used to fabricate devices comprising nanowires that has well-defined and controlled orientation independently on what substrate they are arranged on. The method comprises the steps of providing nanowires and applying an electrical field over the population of nanowires, whereby an electrical dipole moment of the nanowires makes them align along the electrical field. Preferably the nanowires are dispersed in a fluid during the steps of providing and aligning. When aligned, the nanowires can be fixated, preferably be deposition on a substrate. The 10 electrical field can be utilised in the deposition. Pn-junctions or any net charge introduced in the nanowires may assist in the aligning and deposition process. The method is suitable for continuous processing, e.g. in a roll-to-roll process, on practically any substrate materials and not limited to substrates suitable for particle assisted growth.


Patent
Qunano Ab | Date: 2015-04-14

The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.


A device includes at least one nanoscale capillary and means for applying an electric voltage, said means being adapted to create an electric field at least in said capillary when said electric voltage is applied, so that, when said electric voltage is applied, a charged molecule or particle placed within the created electric field can be electrically controlled. A fluidic network structure includes the at least one nanoscale capillary. A method of using and manufacturing the fluidic network structure is also described.


Patent
QuNano AB | Date: 2014-06-10

A resonant tunneling diode, and other one dimensional electronic, photonic structures, and electromechanical MEMS devices, are formed as a heterostructure in a nanowhisker by forming length segments of the whisker with different materials having different band gaps.


Patent
QuNano AB | Date: 2013-11-07

The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.

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