Gyeonggi Do, South Korea
Gyeonggi Do, South Korea

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Shim H.,Technology Quality and Reliability | Kim Y.,Technology Quality and Reliability | Jeon J.,Samsung | Cho Y.,Technology Quality and Reliability | And 3 more authors.
IEEE International Reliability Physics Symposium Proceedings | Year: 2016

As technology scales down, PMOS NBTI-induced mismatch, in addition to the NBTI mean-shifts and time0-Vt variation, is critical for designing circuitry having matched pair transistors, such as OP amplifier. This paper covers mismatch aging models incorporated into design simulation tool for PMIC products and used the Monte-Carlo simulation to consider process and systematic variations for robust design. Circuit simulation for PMIC OP Amp and its output characteristics were investigated and then further validated through the post-silicon HTOL stress. The pre-silicon simulation further enables to optimize HTOL stress conditions. © 2016 IEEE.

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