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Chew J.,Applied Materials | Mahajan U.,Applied Materials | Bajaj R.,Applied Materials | Mirshad I.,Qcept Technologies | Newcomb R.,Qcept Technologies
2013 IEEE International 3D Systems Integration Conference, 3DIC 2013 | Year: 2013

Through Silicon Vias (TSV) is a key technology for advanced 3DIC packaging, enabling improved device performance, integration of multiple functions in a single package and form factor reduction. TSV reveal CMP is one of the key processes in this integration scheme [1]. © 2013 IEEE.


Park J.,Samsung | Cho S.,Qcept Technologies | Hawthorne J.,Qcept Technologies
IEEE Transactions on Semiconductor Manufacturing | Year: 2013

In this paper we discuss the detection, investigation and remediation of a silicon pitting defect in gate oxide patterning processes. The pitting defect is detected by optical inspection after an oxide wet etch operation. The cause of the physical defect is discovered as the result of Non-Visual Defect (NVD) inspection at process steps prior to the wet etch. A particular type of NVD, electric charge on a photoresist film, is detected at a process step immediately prior to the wet etch. A positive charge exceeding a specific level is highly correlated with the pitting defect, which only occurred on silicon that is doped to create an excess of free holes (p-type silicon). The manufacturing process is modified to reduce the level of process-induced charge, which also reduces the occurrence of pitting defects. A similar pitting defect is subsequently detected on a second manufacturing line at a different technology node. In this case, our investigation reveals that high negative charge on photoresist resulted in pitting only on silicon that is doped to create an excess of electrons (n-type silicon). Finite element modeling is used to identify a possible explanation for the charge-induced pitting defect. © 1988-2012 IEEE.


Park J.,Samsung | Cho S.,Qcept Technologies | Hawthorne J.,Qcept Technologies
Solid State Technology | Year: 2012

The detection and investigation of a silicon pitting defect was investigated using standard optical inspection after an oxide wet etch operation. A wafer with a thermal oxide film was coated with photoresist. The resist was then patterned using lithography. This created openings in the photoresist where the oxide film will be removed by the wet etch process. An optical inspection is performed after lithography and prior to the etch operation. A wet etch of the oxide film was then performed in a low ammonium fluoride liquid (LAL), after which the photoresist was removed and the wafer cleaned. Finally, an optical After Clean Inspection (ACT) of the etched wafer was performed. The pitting defect was detected at ACT on 100% of the production wafers, and the defect maps showed strong correlation to end of line yield. The success in reducing pitting defects by reducing surface charge provides strong evidence that charge on the photoresist prior to oxide etch was a direct cause of the pitting.


Spicer R.,Qcept Technologies
Solid State Technology | Year: 2011

Wafer cleaning and surface preparation are the most repeated steps in the fab, up to 100 times per wafer, which means there are many opportunities for a sub-optimal cleaning process to cause catastrophic yield loss. The goal of wafer cleaning is to clean the wafer aggressively enough to remove unwanted material without damaging the underlying structures or substrate. Wafer cleaning can potentially damage these films or change their dielectric constant, either of which impacts device performance. In addition, the transition from polysilicon to metal gates at the 22nm node creates new wafer cleaning challenges. The industry has introduced physical methods, such as single-wafer (spray) cleans and acoustic (megasonic) vibration, to increase the physical action on the wafer surface, allowing less aggressive chemistries to be used.


Lee S.,Samsung | Kang W.,Defect Analysis Group | Shin H.,Samsung | Cho S.,Qcept Technologies | And 2 more authors.
Solid State Technology | Year: 2013

In this paper we have presented the detection and elimination of a yield-critical residue at the FEOL gate and spacer module. The contamination responsible for the yield loss is an example of an NVD, which could not be detected using optical inspection. In this case the residue was detected using a scanning probe technique that detects changes in surface work function, which can be induced by chemical contamination or charging of dielectric films. Surface work function inspection results were used to identify and modify the clean process responsible for the defect. As a result, the defect was eliminated and yield was increased. The inspection system was subsequently used to monitor the process to insure that the defect did not recur.


Assmann H.,Infineon Technologies | Krause A.,Infineon Technologies | Maurer R.,Infineon Technologies | Dankelmann M.,Infineon Technologies | And 3 more authors.
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2015

The adhesion promoter Hexamethyldisilazane (HMDS) plays a crucial role in i-line lithography. According to HMDS deposition forms, a hydrophobic surface defines upwardly directed, non-polar trimethysilyl groups. This condition is of particular importance for wet chemical development and subsequent wet chemical etching processes, because the defined hydrophobic surface prevents water from creeping beneath the resist mask. Undesirable effects, such as (partial) loss of the resist structure or under etching can be prevented. Currently, a common and suitable method to control the success of HMDS deposition is the contact angle measurement. There, a drop of water is applied to the substrate and the contact angle/wetting angle is measured. As a result, conclusions can be drawn about the HMDS process. Unfortunately, however, this simple to implement measurement method raises some problems. The measurement is extremely dependent on the substrate, wherein the measurement results vary greatly. A possible reason for this is the different surface properties of the wafers which are due to adsorbate films. Typically, a contact angle measurement is performed just after the HMDS deposition. A difference between pre-and post-measurement cannot be determined. A deviation of the contact angle can be caused by either an insufficient HMDS seeding, or just as well by other, unknown surface properties. The studies presented here were performed with the measuring system ChemetriQ 5000 from Qcept Technologies. This measurement system was originally developed for Inspection on non-visible defects on the wafer level. It is able to detect differences of work functions as a result of surface coverage by thin film/adsorbate, materials or residues. The change in the surface work function due to the generated adsorbate layer during the HMDS deposition is determined by the measuring system by means of a difference between pre-and post-measurement. © 2015 SPIE.


Specht M.,Infineon Technologies | Franke H.,Infineon Technologies | Luxenhofer O.,Infineon Technologies | Mai K.,Infineon Technologies | And 2 more authors.
2015 26th Annual SEMI Advanced Semiconductor Manufacturing Conference, ASMC 2015 | Year: 2015

The NVD inspection system detected radial 'streak' like NVDs at the post Cu CMP clean process that were not detected by the optical inspection system. Layer to layer overlay of the NVD defect maps from the current Cu CMP layer with the optical defect maps from post nitride deposition and the next copper interconnect level revealed that the NVDs were truly the root cause of the yield critical defect issue. © 2015 IEEE.


Trademark
Qcept Technologies | Date: 2014-09-26

Electronic inspection apparatus consisting of and containing related computer processing and software components and chemical and material calibration components, that are packaged together as a single functional apparatus unit for inspection, quality control and assurance, namely, rapid surface electric and topographic metrology inspection, for semiconductor and wafer process examination and control.


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