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Sridhar L.,Pyramid Design Private Ltd | Lakshmi Prabha V.,Government College of Technology, Coimbatore
International Review on Computers and Software | Year: 2012

In recent years the growing problem of breaches in information security of reconfigurable Field Programmable Gate Array (FPGA) Intellectual Property (IP) cores has created a demand for developing an effective Intellectual Property Protection (IPP) technique for securing the FPGA IP cores. With the increase in use of reconfigurable FPGAs in production designs and in implementation of system on FPGA applications, protecting IP preserves competitive advantage and protects investment. In this paper, a novel wireless scheme based on Radio Frequency Identification (RFID) technology is proposed for securing the information contained in the FPGA IP cores. The existing FPGA core IPP techniques are basically IP core infringement detection techniques with limited protection capability and they do not prevent the unauthorized usage of IP cores. The proposed work is distinct from other existing works, as it is an IP infringement preventive scheme that employs wireless authentication and remote activation techniques to provide access control protection for IP cores. The proposed scheme also overcomes the secure secret decryption key storage problem associated with traditional encryption-based IPP techniques that are widely used for IPP of reconfigurable FPGA IP cores. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging. © 2012 Praise Worthy Prize S.r.l. - All rights reserved. Source


Sridhar L.,Pyramid Design Private Ltd | Lakshmi Prabha V.,Government College of Technology, Coimbatore
Microprocessors and Microsystems | Year: 2013

Field-programmable gate-array (FPGA) based hardware IP cores have emerged as an integral part of modern SOC designs. IP trading plays central role in Electronic Design Automation (EDA) industry. While the potential of IP infringement is growing fast, the global awareness of IP protection remains low. In this work, we propose a Radio Frequency Identification (RFID) based protection scheme for Intellectual Property Protection (IPP) of Static Random Access Memory (SRAM) FPGA IP cores that overcome the limitations of existing IPP techniques. Here, three types of reconfigurable RFID tags is realised in order to support the incorporation of the proposed RFID based security scheme in all the reconfigurable FPGA devices of Xilinx family. Also a special tag bypass feature is employed to increase the suitability of proposed scheme as an IPP technique for reconfigurable IP cores. The proposed scheme supports safe exchange of reconfigurable FPGA IP cores between IP providers and system developers. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging and shows that the proposed security feature can be incorporated into the reconfigurable IP cores of any functionality without significant performance degradation of the reconfigurable IP cores. © 2013 Elsevier B.V. All rights reserved. Source


Sridhar L.,Pyramid Design Private Ltd | Prabha V.L.,Government College of Technology, Coimbatore
International Journal of Electronic Security and Digital Forensics | Year: 2013

The constantly growing demand for ready to use design components, also known as intellectual property (IP) cores, has created a very lucrative and flourishing market which is very likely to continue its current path not only into the near future. With increase in use of field programmable gate arrays (FPGAs) in production designs, and with growth of system on FPGA (SOF) applications, the security of FPGA IP cores cannot be taken for granted anymore. In this paper, we have proposed a novel wireless-based IP core infringement preventive approach for intellectual property protection (IPP) of static random access memory (SRAM)-based FPGA IP cores. The proposed scheme exploits reconfiguration aspect of SRAM-based FPGA and incorporates special tag bypass features for increase suitability of proposed scheme as an IPP technique for reconfigurable IP cores. A hardware prototype is developed for evaluation of proposed scheme and the testing results are quite encouraging. Copyright © 2013 Inderscience Enterprises Ltd. Source


Sridhar L.,Pyramid Design Private Ltd
European Journal of Scientific Research | Year: 2012

With the increase in use of Field Programmable Gate Arrays (FPGAs) in production designs, and with the growth of System on FPGA (SOF) applications, the security of the Hardware Intellectual Property (HIP) cores cannot be taken for granted anymore. The HIP cores must be vigorously protected to preserve competitive advantages and to protect investments. In this paper, we have proposed a novel wireless protection technique for reconfigurable HIP cores by exploiting the reconfiguration capacity of the cores. The existing HIP protection techniques are basically HIP core infringement detection techniques with limited protection capability and they do not prevent the unauthorised usage of HIP cores. Our proposition is distinct from other existing works, as it is a HIP infringement preventive approach that employs wireless authentication and remote activation techniques to provide access control protection for HIP cores. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging. © EuroJournals Publishing, Inc. 2012. Source


Laavanya S.,Pyramid Design Private Ltd
International Journal of Electronic Security and Digital Forensics | Year: 2012

Field programmable gate arrays (FPGAs) have become increasingly popular due to their rapid development times and low costs. Many FPGA-based systems utilise third-party intellectual property (IP) in their development. With their increased use, the need to protect the IP against unauthorised use has become important. In this paper, we have proposed a novel wireless intellectual property protection (IPP) technique that overcomes the secure secret decryption key storage problem associated with traditional encryption-based IPP techniques that are widely used for IPP of static random access memory-based FPGA IP cores. The proposed scheme also provides an extra authentication protection for IP cores to make it more security efficient. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging. Copyright © 2012 Inderscience Enterprises Ltd. Source

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