Cristiano F.,Roche Holding AG |
Qiu Y.,Roche Holding AG |
Bedel-Pereira E.,Roche Holding AG |
Huet K.,Excico Inc. |
And 8 more authors.
2014 International Workshop on Junction Technology, IWJT 2014 | Year: 2014
The formation of extended defects and their impact on dopant activation in nanosecond laser annealed silicon is investigated. It is found that laser anneal favours the formation of 'unconventional' (001) loops (typically not expected to occur in ion implanted silicon). (001) loops are formed near the liquid-solid interface (in the non-molten side region). Following non-melt anneals, these loops act as scattering centres, leading to carrier mobility degradation. In contrast, in the case of melt anneals, the molten region itself is of excellent crystalline quality, free of any large defects and leads to very high activation rates. Full melting of the implanted region leads to an almost perfectly recrystallized layer. Finally, we demonstrate how the internal stress generated in silicon during ultra-fast laser annealing in the ns regime can modify the fundamental mechanisms of defect formation and lead to the formation of these 'unconventional' loops. © 2014 IEEE. Source
Cowern N.E.B.,Northumbria University |
Simdyankin S.,Northumbria University |
Ahn C.,Northumbria University |
Bennett N.S.,Northumbria University |
And 9 more authors.
Physical Review Letters | Year: 2013
B diffusion measurements are used to probe the basic nature of self-interstitial point defects in Ge. We find two distinct self-interstitial forms - a simple one with low entropy and a complex one with entropy ∼30 k at the migration saddle point. The latter dominates diffusion at high temperature. We propose that its structure is similar to that of an amorphous pocket - we name it a morph. Computational modeling suggests that morphs exist in both self-interstitial and vacancylike forms, and are crucial for diffusion and defect dynamics in Ge, Si, and probably many other crystalline solids. © 2013 American Physical Society. Source
Cristiano F.,Roche Holding AG |
Shayesteh M.,Tyndall National Institute |
Duffy R.,Tyndall National Institute |
Huet K.,LASSE DaiNippon Screen |
And 10 more authors.
Materials Science in Semiconductor Processing | Year: 2016
Defect evolution and dopant activation are intimately related to the use of ion implantation and annealing, traditionally used to dope semiconductors during device fabrication. Ultra-fast laser thermal annealing (LTA) is one of the most promising solutions for the achievement of abrupt and highly doped junctions. In this paper, we report some recent investigations focused on this annealing method, with particular emphasis on the investigation of the formation and evolution of implant/anneal induced defects and their impact on dopant activation. In the case of laser annealed Silicon, we show that laser anneal favours the formation of "unconventional" (001) loops that, following non-melt anneals, act as carrier scattering centres, leading to carrier mobility degradation. In contrast, in the case of melt anneals, the molten region itself is of excellent crystalline quality, defect-free and with very high activation rates. As for laser annealed Germanium, we studied in detail the amorphous to crystalline Ge phase transition as a function of the increasing LTA energy density and we found that using LTA, very high carrier concentrations (above 1020 cm-3) were achieved in As doped regions, which are unachievable with conventional rapid thermal annealing (RTA) processes. © 2015 Elsevier Ltd. All rights reserved. Source
Essa Z.,STMicroelectronics |
Essa Z.,Roche Holding AG |
Essa Z.,Toulouse 1 University Capitole |
Cristiano F.,Roche Holding AG |
And 16 more authors.
Physica Status Solidi (C) Current Topics in Solid State Physics | Year: 2014
BF3 plasma immersion ion implantation (PIII) is a promising technique in the race for highly boron doped P+/N ultra-shallow junctions (USJs) in complementary metal oxide semiconductor (CMOS) silicon technologies. Implantation conditions used in BF3 PIII lead to high super-saturations (≥1 × 1020 cm-3) of both boron and silicon interstitial atoms in the implantation region. In such conditions, very large loop-shaped boroninterstitial clusters (BICs) are formed during subsequent thermal anneals, as confirmed by transmission electron microscopy (TEM) measurements. In this study, amorphizing BF3 PIII implants (10 keV, 5 × 1015 cm-2) followed by different thermal anneals were carried out in order to investigate the large BICs precipitation. A "large BICs" model based on moments approach allowed to reproduce the experimental data including boron diffusion profiles (obtained by SIMS) and boron electrical activation obtained by Hall effect sheet resistance measurements. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. Source
Hartmann J.M.,University Grenoble alpes |
Hartmann J.M.,CEA Grenoble |
Benevent V.,CEA Grenoble |
Andre A.,University Grenoble alpes |
And 12 more authors.
ECS Journal of Solid State Science and Technology | Year: 2014
We have developed an innovative 500°C process for the selective deposition of SiGe:B Raised Sources and Drains (RSDs).We have first of all studied on blanket Si wafers the in-situ boron doping of SiGe with Si2H6, GeH4 and B2H6. A growth rate increase by a factor higher than 4 together with a Ge concentration decrease from 45% down to 28% occurred as the diborane mass-flow increased (at 500°C, 20 Torr). Very high substitutional boron concentrations were achieved (~5 × 1020 cm-3) in layers that were single crystalline and flat. Adding large amounts of HCl to the gaseous mixture did not yield the selectivity aimed for on SiO2-covered Si wafers, however. To that end, we have thus benchmarked various 500°C Cyclic Deposition / Etch (CDE) processes. 12 cycles CDE processes were characterized by HCl etch rates of poly-SiGe:B that were too low to be of any practical use or yielded 3 dimensional SiGe:B layers on Si(001). Straightforward Deposition / Etch (DE) processes, with the HCl selective etch of poly-SiGe:B carried out at 740 Torr (i.e. atmospheric pressure), enabled us by contrast to achieve selectivity on SiO2 while retaining single crystalline and slightly rough SiGe:B layers. Those DE processes were tested on patterned Silicon-On-Insulator substrates with gate stacks. Longer HCl etch times than the ones identified on blanket wafers were key in getting rid of poly-SiGe:B on top of dielectrics covered surfaces; rather smooth, facetted SiGe:B RSDs were obtained in the end. © 2014 The Electrochemical Society. Source