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Bochenek D.,University of Silesia | Guzdek P.,Polish Institute of Electron Technology
Journal of Magnetism and Magnetic Materials | Year: 2011

PbFe1/2Nb1/2O3 (PFN) ceramics, to which an admixture of manganese oxide (MnO2) was added, was obtained by calcination of the powder in a single stage synthesis. Compacting was made by a free sintering method. Results of investigations of microstructure, magnetic, magnetoelectric, dielectric and piezoelectric properties and electric conductivity vs. temperature are presented. The influence of manganese admixture on the physical properties of the PFN ceramics is presented. The admixtures decrease the electric conduction of the PFN ceramic specimens. © 2010 Elsevier B.V.


Guzdek P.,Polish Institute of Electron Technology
Journal of Magnetism and Magnetic Materials | Year: 2014

Magnetoelectric effect in multiferroic materials is widely studied for its fundamental interest and practical applications. The magnetoelectric effect observed for single phase multiferroics is usually small. A much larger effect can be obtained in composites consisting of magnetostrictive and ferroelectric phases. This paper investigates the magnetoelectric effect of multilayer (laminated) structure consisting of 7 nickel ferrite and 8 PFN relaxor layers. It describes the synthesis and tape casting process for Ni0.3Zn 0.62Cu0.08Fe2O4 ferrite and relaxor PbFe0.5Nb0.5O3 (PFN). Magnetic susceptibility, hysteresis, ZFC-FC curves and dependencies of magnetization versus temperature for PFN relaxor and magnetoelectric composite were measured with a vibrating sample magnetometer (VSM) in an applied magnetic field up to 85 kOe at a temperature range of 10-400 K. Parallel and perpendicular magnetostriction of the pure ferrite and bulk and laminated composites were measured at room temperature as a function of the magnetic field (0.3-6.5 kOe). Magnetoelectric effect at room temperature was investigated as a function of the static magnetic field (0.3-6.5 kOe) and the frequency of the sinusoidal magnetic field (0.01-6.5 kHz). At lower magnetic field, the magnetoelectric coefficient increases slightly before reaching a maximum and then decreases. The magnetoelectric coefficient αME increases continuously as the frequency is raised, although this increase is less pronounced in the 1-6.5 kHz range. The maximum values of magnetoelectric coefficient attained for the layered composites exceed about 50 mV/(Oe cm). © 2013 Elsevier B.V.


Szwagierczak D.,Polish Institute of Electron Technology
Acta Physica Polonica A | Year: 2012

A new perovskite material Nd 2/3CuTa 4O 12 was applied as a naturally formed internal barrier layer capacitor. The powder prepared by solid state synthesis and ball milling was pressed into pellets and sintered at 1180-1220°C. Dielectric properties of ceramic samples were characterized by impedance spectroscopic studies carried out in the temperature range from -55 to 700°C at frequencies 10 Hz ÷ 2 MHz. Two types of the dielectric response were revealed - a high frequency response attributed to grains which occurred at low temperatures, and a low frequency one related to grain boundaries which dominated at higher temperatures. Resistances and capacitances of grains were found to be two orders lower than those of grain boundaries. Two plateaus were observed in the dielectric permittivity versus frequency plots - a low frequency step corresponding to a high value of 104 and a high frequency step at a level of 40. Scanning electron microscopy observations and energy dispersive spectroscopy analysis confirmed that Nd 2/3CuTa 4O 12 ceramics were composed of semiconducting grains and insulating oxygen-enriched grain boundaries. The formation of such an electrically heterogeneous system during the one step fabrication process in air leads to spontaneous internal barrier layer capacitance effects responsible for a high and relatively stable dielectric permittivity of the developed material.


Grant
Agency: Cordis | Branch: FP7 | Program: CP | Phase: ICT-2013.3.1 | Award Amount: 5.85M | Year: 2014

Modular interposer architecture providing scalable heat removal, power delivery and communicationCarrICool will deliver a game-changing 3D packaging platform for scale-up of future, many-core, Exascale computing systems. The project will also develop a strategic supplier base in Europe for high-end HPC components and systems integration capabilities in the Exascale era. In CarrICool, advanced More-than-Moore components required to scale to energy efficient ExaFLOP computing performance will be developed and integrated into a modular and multifunctional interposer. Four critical packaging elements are implemented on the CarrICool interposer: i) Improved structural and electrical performance will be provided by expansion matching and high wiring density. ii) low thermal gradients for Beyond-CMOS and silicon photonic devices will be provided by integrated, single-phase, water-cooling cavities. iii) High granularity, distributed Buck-converters using integrated, high-quality power inductors will support energy-efficient power delivery to heterogeneous chip stacks. iv) Off-chip bandwidth will be enabled through low-cost and low-loss passive optical coupling to silicon photonic wave guides. CarrICool is targeting 2-fold improvement in heat removal, 10-fold higher voltage granularity and a 10-fold cost reduction in photonic packaging.Advanced characterization and simulation techniques will be implemented using physics-of-failure-based lifetime modelling to provide design-rules for improved system architecture. The performance of the four packaging elements of the modular interposer will be validated on three separate demonstrators and then integrated on the main CarrICool demonstrator. The CarrICool consortium pools interdisciplinary excellence, uniting ten partners from global companies (2), European SMEs (3), institutes (3) and academia (2) across seven European countries. An Advisory Board ensures the alignment of the project goals with user needs.


Grant
Agency: Cordis | Branch: FP7 | Program: CP | Phase: ICT-2011.3.2 | Award Amount: 13.04M | Year: 2011

Smart systems consist of heterogeneous subsystems and components providing different functionalities; they are normally implemented as Multi-Package on a Board. To fully exploit the potential of current nanoelectronics technologies, as well as to enable the integration of existing/new IPs and More than Moore devices, smart system miniaturization and Multi-Chip in a Package implementation are unavoidable. Such goals are only achievable if a flexible software platform (i.e., the SMAC platform) for smart subsystems/components design and integration is made available to designers and system integrators.\nThe platform must include methodologies and EDA tools enabling multi-disciplinary and multi-scale modeling and design, simulation of multi-domain systems, subsystems and components at all levels of abstraction, system integration and exploration for optimization of specific metrics, such as power, performance, reliability and robustness.\nKey ingredients for the construction of the SMAC platform include: (1) The development of a cosimulation and co-design environment which is aware (and thus considers) the essential features of the basic subsystems and components to be integrated. (2) The development of modeling and design techniques, methods and tools that, when added to the platform, will enable multi-domain simulation and optimization at various levels of abstraction and across different technological domains.\nThe SMAC platform will allow to successfully address the following grand challenges related to the design and manufacturing of miniaturized smart systems: (1) Development of innovative smart subsystems and components demonstrating advanced performance, ultra low power and the capability of operating under special conditions (e.g., high reliability, long lifetime). (2) Design of miniaturized and integrated smart systems with advanced functionality and performance, including nanoscale sensing systems, possibly operating autonomously and in a networked fashion

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