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Santa Clara, CA, United States

PMC-Sierra is an American fabless semiconductor company which develops and sells devices into the communications, storage, printing, and embedded computing marketplaces. Wikipedia.


Linn Y.,PMC-Sierra
IEEE Transactions on Education | Year: 2012

This paper presents an ultra-low-cost wireless communications laboratory that is based on a commercial off-the-shelf field programmable gate array (FPGA) development board that is both inexpensive and available worldwide. The total cost of the laboratory is under USD $200, but it includes complete transmission, channel emulation, reception (coherent and noncoherent), and probing capabilities. Over 15 different modulation types are currently supported. The laboratory, aimed primarily to serve as a teaching aid for a professor teaching senior undergraduate courses and projects, allows students to have visual real-time demonstrations in wireless communications systems. The laboratory is also powerful enough to allow experienced researchers to carry out wireless communications research projects. In this context, the laboratory is particularly useful for universities in developing countries, where budgets are extremely limited. Numerical and written survey results are presented that were collected from two classes of students taught by the author in a university in Colombia, South America, and which show the effectiveness of the laboratory in teaching wireless communications. © 2012 IEEE.


A nonvolatile memory storage controller is provided for delivering log likelihood ratios (LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC encoded codeword. The controller includes read circuitry for reading an LDPC encoded codeword stored in a nonvolatile memory storage module using a plurality of soft-decision reference voltages to provide a plurality of soft-decision bits representative of the codeword. The controller further includes a plurality of neighboring cell contribution LLR look-up tables representative of the contribution of the neighboring cells to threshold voltage distribution of the memory storage module. The controller provides the LLRs from the appropriate LLR look-up table to an LDPC decoder for the subsequent decoding of the codeword.


A nonvolatile memory storage controller for delivering log likelihood ratios (LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC encoded codeword. The controller includes partitioning circuitry for identifying a set of soft-decision reference voltages having the smallest calculated introduced error value based upon the estimated BER of the nonvolatile memory. The controller further includes read circuitry for reading an LDPC encoded codeword stored in a nonvolatile memory storage module using the set of soft-decision reference voltages having the smallest calculated LLR introduced error value to provide a plurality of soft-decision bits representative of the codeword. The controller further includes an LLR look-up table accessible by the read circuitry to provide LLRs to the LDPC decoder for the subsequent decoding of the codeword.


Patent
PMC-Sierra | Date: 2013-03-07

A system and method for Passive Optical Networks (PON) providing integration (cross-correlation) of powersave and fiber protection, optionally with encryption, facilitating the successful operation and/or benefits that can be gained when operating a PON system with these features. A major problem with power save is the detection, since both the OLT and the ONUs rely on a valid signal in order to detect fiber failure. However, the OLT may not detect this for sleeping ONUs, and an ONU in Tx/Rx sleep-mode, may not detect a fiber failure, and may not be aware of the OLTs switchover. In addition to solving the problem of combined fiber protection and power savings, a solution is also needed for providing security for this combination. A current embodiment is a system and method for Passive Optical Networks (PON) providing integration (cross-correlation) of powersave and fiber protection, optionally with encryption.


An unrolled decision feedback equalizer (DFE) as disclosed herein has a reduced number of compensation factors while keeping a suitable performance level for a given application. The K

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