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San Diego, CA, United States

Peregrine Semiconductor is a San Diego-based manufacturer of high-performance RF CMOS integrated circuits. The company's products are used in aerospace and defense, broadband, industrial, mobile wireless device, test and measurement equipment and wireless infrastructure markets. Peregrine's UltraCMOS technology is a proprietary implementation of silicon on sapphire and silicon on insulator substrates that enables high levels of monolithic integration. Wikipedia.


Patent
Peregrine Semiconductor | Date: 2015-02-13

Biasing methods and devices for amplifiers are described. The described methods generate bias voltages proportional to the amplifier output voltage to control stress voltages across transistors used within the amplifier.


A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an RF+ terminal and the second terminal comprises an RF terminal. In accordance with some embodiments, the DTCs comprise a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second RF terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.


Patent
Peregrine Semiconductor | Date: 2015-03-04

A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an active bias resistor circuit that conducts between output terminals only during portions of a waveform appearing between the terminals, and/or wherein the bias voltage is generated by switching a small capacitance at cycles of said waveform. A threshold voltage bias voltage generation circuit may A charge pump for the bias generation may include a regulating feedback loop including an OTA that is also suitable for other uses, the OTA having a ratio-control input that controls a current mirror ratio in a differential amplifier over a continuous range, and optionally has differential outputs including an inverting output produced by a second differential amplifier that optionally includes a variable ratio current mirror controlled by the same ratio-control input. The ratio-control input may therefore control a common mode voltage of the differential outputs of the OTA. A control loop around the OTA may be configured to control the ratio of one or more variable ratio current mirrors, which may particularly control the output common mode voltage, and may control it such that the inverting output level tracks the non-inverting output level to cause the amplifier to function as a high-gain integrator.


Patent
Peregrine Semiconductor | Date: 2015-05-22

Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.


Patent
Peregrine Semiconductor | Date: 2015-05-11

Systems, methods, and apparatus for reducing standing wave reflections between delay line modules are described. The delay line modules include semiconductor switches, particularly MOSFET switches fabricated on silicon-on-insulator (SOI) and silicon-on-sapphire (SOS) substrates and embedded attenuators.

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