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Pascale A.,Murdoch University | Urmee T.,Murdoch University | Moore A.,PE International
Renewable Energy | Year: 2011

Rural electrification and the provision of low cost, low emission technology in developing countries require decision makers to be well informed on the costs, appropriateness and environmental credentials of all available options. While cost and appropriateness are often shaped by observable local considerations, environmental considerations are increasingly influenced by global concerns which are more difficult to identify and convey to all stakeholders.Life cycle assessment is an iterative process used to analyse a product or system. This study iteratively applies life cycle assessment (LCA) to a 3 kW community hydroelectric system located in Huai Kra Thing (HKT) village in rural Thailand. The cradle to grave analysis models the hydropower scheme's construction, operation and end of life phases over a period of twenty years and includes all relevant equipment, materials and transportation.The study results in the enumeration of the environmental credentials of the HKT hydropower system and highlights the need to place environmental performance, and LCA itself, in a proper context. In the broadest sense, LCA results for the HKT hydropower system are found to reflect a common trend reported in hydropower LCA literature, namely that smaller hydropower systems have a greater environmentally impact per kWh - perform less well environmentally - than larger systems. Placed within a rural electrification context, however, the HKT hydropower system yields better environmental and financial outcomes than diesel generator and grid connection alternatives. © 2011 Elsevier Ltd. Source


Bol D.,Catholic University of Louvain | De Vos J.,Catholic University of Louvain | Hocquet C.,Catholic University of Louvain | Botman F.,Catholic University of Louvain | And 4 more authors.
Digest of Technical Papers - IEEE International Solid-State Circuits Conference | Year: 2012

The vision of the Internet of Things with ambient intelligence calls for the deployment of up to a trillion connected wireless sensor nodes (WSNs). Minimizing the carbon footprint of each node is paramount from the sustainability perspective. In ultra-low-power applications, the life-cycle carbon footprint results from a complex balance between both embodied and use-phase energies [1]. The embodied energy arises mainly from CMOS chip manufacturing, and is essentially proportional to die area. Use-phase energy depends on both active and sleep-mode power, because of long stand-by periods in WSNs. In this paper, we present an ultra-low-power 25MHz microcontroller SoC that fully exploits the versatility of a 65nm CMOS process with a low-power/general-purpose (LP/GP) transistor mix (dual-core oxide) to obtain: i) 7μW/MHz active power consumption due to a 0.4V ultra-low-voltage (ULV) thin-core-oxide (GP) CPU supplied by a 78%-efficiency embedded DC/DC converter; ii) 0.66mm 2 die area for low embodied energy due to a compact converter design and a dual-V DD architecture, enabling the use of the foundry's 1V high-density 6T SRAM bitcell; and, iii) 1.5μW sleep-mode power due to body-biased sleep transistors embedded into the converter and thick-core-oxide (LP) MOSFETs for retentive SRAM and always-on peripherals (AOP). Moreover, an on-chip adaptive voltage scaling (AVS) system controlling the converter ensures safe 25MHz operation at ULV for all PVT conditions. A multi-V t clock tree is also proposed to achieve reliable timing closure with low-power SoC features. Finally, a glitch-masking instruction cache (I$) is implemented to reduce the access power of the 1V program memory (PMEM). © 2012 IEEE. Source


Margallo M.,University of Cantabria | Aldaco R.,University of Cantabria | Irabien A.,University of Cantabria | Carrillo V.,PE International | And 3 more authors.
Waste Management and Research | Year: 2014

In recent years, waste management systems have been evaluated using a life cycle assessment (LCA) approach. A main shortcoming of prior studies was the focus on a mixture of waste with different characteristics. The estimation of emissions and consumptions associated with each waste fraction in these studies presented allocation problems. Waste-to-energy (WTE) incineration is a clear example in which municipal solid waste (MSW), comprising many types of materials, is processed to produce several outputs. This paper investigates an approach to better understand incineration processes in Spain and Portugal by applying a multi-input/output allocation model. The application of this model enabled predictions of WTE inputs and outputs, including the consumption of ancillary materials and combustibles, air emissions, solid wastes, and the energy produced during the combustion of each waste fraction. © The Author(s) 2014. Source


Bol D.,Catholic University of Louvain | De Vos J.,Catholic University of Louvain | Hocquet C.,Catholic University of Louvain | Hocquet C.,National Instruments | And 5 more authors.
IEEE Journal of Solid-State Circuits | Year: 2013

Integrated circuits for wireless sensor nodes (WSNs) targeting the Internet-of-Things (IoT) paradigm require ultralow-power consumption for energy-harvesting operation and low die area for low-cost nodes. As the IoT calls for the deployment of trillions of WSNs, minimizing the carbon footprint for WSN chip manufacturing further emerges as a third target in a design-for-the-environment (DfE) perspective. The SleepWalker microcontroller is a 65-nm ultralow-voltage SoC based on the MSP430 architecture capable of delivering increased speed performances at 25 MHz for only 7 μW/MHz at 0.4 V. Its sub-mm2 die area with low external component requirement ensures a low carbon footprint for chip manufacturing. SleepWalker incorporates an on-chip adaptive voltage scaling (AVS) system with DC/DC converter, clock generator, memories, sensor and communication interfaces, making it suited for WSN applications. An LP/GP process mix is fully exploited for minimizing the energy per cycle, with power gating to keep stand-by power at 1.7 μW. By incorporating a glitch-masking instruction cache, system power can be reduced by up to 52%. The AVS system ensures proper 25-MHz operation over process and temperature variations from-40 °C to +85°C$, with a peak efficiency of the DC/DC converter above 80%. Finally, a multi-Vt clock tree reduces variability-induced clock skew by 3× to ensure robust timing closure down to 0.3 V. © 1966-2012 IEEE. Source


Schmincke E.,PE International
CESB 2013 PRAGUE - Central Europe Towards Sustainable Building 2013: Sustainable Building and Refurbishment for Next Generations | Year: 2013

The European standards EN 15804 and EN 15978 constitute a harmonised framework for providing basic environmental information for sustainable construction by using Type III environmental product declarations (EPD) based on LCA on the product and building level. The standards are built on a broad European consensus in the construction sector. They are voluntary and their implementation in real life practice is coordinated on a voluntary basis by the ECO Platform, which is an association of European EPD program operators in the construction sector. The objective of the ECO Platform is to support the provision of unbiased, credible and scientifically sound information in form of a type III Environmental Product Declaration for construction products. Source

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