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Kawasaki, Japan

Patent
NEC LCD Technologies Ltd. | Date: 2012-01-31

In a semiconductor circuit a floating node is set to any voltage by utilizing a control signal applied to a refresh terminal and has a period shorter than that of a clock signal. The circuit includes first and second transistors connected between a first clock terminal and first power supply terminal, third and fourth transistors connected between the refresh terminal and the first power supply terminal, and fifth and sixth transistors connected between a second power supply terminal and the first power supply. Gates of the fourth and fifth transistors are connected to an input terminal, a gate of the third transistor is connected to a second clock terminal, a gate of the first transistor is connected to a node between the fifth and sixth transistors, gates of the second and sixth transistors are connected, and a node between the first and second transistors is connected to an output terminal.


Patent
Nec Lcd Technologies Ltd. | Date: 2012-03-16

There is provided a display area made up of a pixel array with a non-rectangular shaped outer circumference and the pixel array is made up of a plurality of non-rectangular pixels wherein a first conductor line group including a plurality of first conductor lines and a second conductor line group including a plurality of second conductor lines, and a third conductor line group including a plurality of third conductor lines are arranged so as to intersect with one another. Thus, without sacrificing brightness, viewability, and fidelity of an image, pixel array (display device) with the non-rectangular outer circumferential shape being excellent in design characteristics is realized.


Patent
NEC LCD Technologies Ltd. and NEC Corp | Date: 2012-11-21

A display device comprising a light source and having an optical waveguide, a louver, an anisotropic scattering sheet, and a transmissive liquid crystal panel disposed along the path of light emitted from the light source. The light-restricting direction of the louver is tilted at an angle from the Y-axis direction. The value of the angle is set so that the arrangement direction of moir created between the louver and the liquid crystal panel approaches the X-axis direction. A plurality of belt-shaped convex portions extending in the Y-axis direction are formed on the surface of the anisotropic scattering sheet, and are configured so that the scattering direction of the light has anisotropy. Specifically, scattering in the X-axis direction is increased, and scattering in the Y-axis direction is reduced. Moir can thereby be reduced in a display device having increased directivity of the display.


Patent
Nec Lcd Technologies Ltd. | Date: 2013-03-04

A liquid crystal display device of IPS mode includes an array of pixels arranged in a matrix pattern by crossing a plurality of video signal lines and a plurality of scanning signal lines each other. Each of the pixels is provided with at least a switching element. A transparent insulating film is provided on both signal lines, and a plurality of pixel electrodes, common electrodes and common lines are provided on the transparent insulating film. The common lines are formed in a grid-shaped pattern such that a first group of the common lines is made of a first conductor having lower reflectivity against optical light than that of metal while a second group of the common lines is made of a second conductor including a metal layer such that said first group and said second group are crossing each other along said video signal lines and said scanning signal lines.


Patent
Nec Lcd Technologies Ltd. | Date: 2012-11-14

The present invention provides a thin-film transistor manufactured on a transparent substrate having a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate; wherein the channel region having channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film; the light blocking film is divided across the channel region; and interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d). Thereby, the cost for manufacturing the thin-film transistor is low, and the photo leak current of the thin-film transistor is suppressed.

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