Crane, IN, United States


Crane, IN, United States
Time filter
Source Type

Gadlage M.J.,NAVSEA Crane | Ahlbin J.R.,Missile Defense Agency (MDA) | Gadfort P.,U.S. Army | Roach A.H.,NAVSEA Crane | Stansberry S.,University of Southern California
IEEE Transactions on Nuclear Science | Year: 2017

Single-event transients (SETs) induced by alpha particles and heavy ions are measured and analyzed with subthreshold voltage SET characterization circuits. Using a Schmitt trigger inverter target chain fabricated in a 65-nm bulk CMOS process, SET pulse widths are captured from an operating voltage down to 0.32 V. At nominal voltages, the Schmitt trigger inverter chain is immune to SETs, but at subthreshold voltages energetic particles can induce SET pulse widths that range up to and over a microsecond. Additionally, the results show that at subthreshold voltages the 28-nm node offers a significant improvement in the SET response over the 65-nm node. © 1963-2012 IEEE.

Smith A.F.,NAVSEA Crane | Skrabalak S.E.,Indiana University Bloomington
Journal of Materials Chemistry C | Year: 2017

The global economic, security, and health challenges presented by counterfeit goods require new approaches toward anti-counterfeit labels. This review describes recent advances in the use of metal nanomaterials for optical anti-counterfeit labels that may offer a multiplexed approach to security tags that can be easily fabricated, offer large coding capacity, and be interrogated throughout the supply chain and by the end user. This review also critically discusses the current approach to developing continuously more complex labels and offers awareness toward the need for simple, yet unclonable, taggants. © The Royal Society of Chemistry.

Ahlbin J.R.,Vanderbilt University | Gadlage M.J.,NAVSEA Crane | Atkinson N.M.,Vanderbilt University | Narasimham B.,Broadcom Corporation | And 5 more authors.
IEEE Transactions on Device and Materials Reliability | Year: 2011

Heavy-ion data from a 130-nm bulk CMOS process shows a counterproductive result in using a common single-event charge collection mitigation technique. Guard bands, which are well contacts that surround individual transistors, can reduce single-event pulsewidths for normal strikes, but increase them for angled strikes. Calibrated 3-D TCAD mixed-mode modeling has identified a multiple-transistor charge collection mechanism that explains the experimental data, namely that angled strikes result in charge collection in the normally ON device that increases the restoring current on the struck device. © 2010 IEEE.

Gadlage M.J.,NAVSEA Crane | Ahlbin J.R.,Vanderbilt University | Narasimham B.,Broadcom Corporation | Bhuva B.L.,Vanderbilt University | And 2 more authors.
IEEE Transactions on Device and Materials Reliability | Year: 2011

In this paper, heavy-ion-induced single-event transient (SET) pulsewidths measured in a 65-nm bulk CMOS technology at temperatures ranging from 25 ° C to 100° with an autonomous SET capture circuit are presented. The experimental results for the SETs induced in two different inverter chain circuits indicate an increase in the average SET pulsewidth as a function of the operating temperature. Unique SET test structures were also designed to differentiate between SETs induced in an nMOS transistor and those induced in a pMOS transistor. The SET widths induced in a pMOS transistor increase more with temperature than the SETs induced in an nMOS transistor. © 2006 IEEE.

Titus J.L.,NAVSEA Crane
IEEE Transactions on Nuclear Science | Year: 2013

Studies over the past 25 years have shown that heavy ions can trigger catastrophic failure modes in power MOSFETs [e.g., single-event gate rupture (SEGR) and single-event burnout (SEB)]. In 1996, two papers were published in a special issue of the IEEE Transaction on Nuclear Science [Johnson, Palau, Dachs, Galloway and Schrimpf, 'A Review of the Techniques Used for Modeling Single-Event Effects in Power MOSFETs,' IEEE Trans. Nucl. Sci., vol. 43, no. 2, pp. 546-560, April. 1996], [Titus and Wheatley, 'Experimental Studies of Single-Event Gate Rupture and Burnout in Vertical Power MOSFETs,' IEEE Trans. Nucl. Sci., vol. 43, no. 2, pp. 533-545, Apr. 1996]. Those two papers continue to provide excellent information and references with regard to SEB and SEGR in vertical planar MOSFETs. This paper provides updated references/information and provides an updated perspective of SEB and SEGR in vertical planar MOSFETs as well as provides references/information to other device types that exhibit SEB and SEGR effects. © 1963-2012 IEEE.

Duncan A.R.,NAVSEA Crane | Gadlage M.J.,NAVSEA Crane | Roach A.H.,NAVSEA Crane | Kay M.J.,NAVSEA Crane
IEEE Transactions on Nuclear Science | Year: 2016

Radiation and stress-induced degradation are characterized in split-gate NOR flash cells through a set of unique experiments. Radiation and program/erase stress on the bit cells is shown to create both positive and negative traps in the oxide around the floating gate cell. The annealing temperature following radiation determines the rate at which oxide traps are neutralized. To analyze both program/erase and radiation induced damage in greater detail; partial program and erase operations are performed. The implications of this work for both radiation hardness assurance testing and device reliability are discussed. © 2016 IEEE.

Blaine R.W.,Vanderbilt University | Armstrong S.E.,NAVSEA Crane | Kauppila J.S.,Vanderbilt University | Atkinson N.M.,Vanderbilt University | And 3 more authors.
IEEE Transactions on Nuclear Science | Year: 2011

A novel radiation-hardened-by-design (RHBD) technique that utilizes charge sharing to mitigate single-event voltage transients is employed to harden bias circuits. Sensitive node active charge cancellation (SNACC) compensates for injected charge at critical nodes in analog and mixed-signal circuits by combining layout techniques to enhance charge sharing with additional current mirror circuitry. The SNACC technique is verified with a bootstrap current source using simulations in a 90-nm CMOS process. Reductions of approximately 66% in transient amplitude and 62% in transient duration are observed for 60-degree single-event strikes with an LET of 40 MeV*cm 2/mg. © 2011 IEEE.

Armstrong S.E.,NAVSEA Crane | Armstrong S.E.,Vanderbilt University | Olson B.D.,NAVSEA Crane | Holman W.T.,Vanderbilt University | And 3 more authors.
IEEE Transactions on Nuclear Science | Year: 2010

Layout techniques that exploit charge-sharing phenomena for analog single-event transient (ASET) mitigation in fully-differential analog/mixed-signal (A/MS) designs are experimentally explored in a 65 nm CMOS process. Benefits of the proposed RHBD layout techniques are illustrated through circuit simulations. Preliminary RHBD layout guidelines are discussed. © 2010 IEEE.

Jagannathan S.,Vanderbilt University | Gadlage M.J.,NAVSEA Crane | Bhuva B.L.,Vanderbilt University | Schrimpf R.D.,Vanderbilt University | And 4 more authors.
IEEE Transactions on Nuclear Science | Year: 2010

A novel circuit design for separating single-event transients due to N-hits and P-hits is described. Measurement results obtained from a 65 nm technology using heavy-ions show different dominant mechanisms for charge collection for P-hits and N-hits. The data collected represent the first such separation of SET pulse widths for 65 nm bulk CMOS technology. For low LET particles, N-hit transients are longer, but for high LET particles, P-hit transients are longer. N-well depth and the parasitic bipolar effect are shown to be the most important parameters affecting transient pulse widths. © 2010 IEEE.

Song C.,University of Hawaii at Manoa | Song C.,Concentris Systems LLC | Boric-Lubecke O.,University of Hawaii at Manoa | Lo I.,Navsea Crane
Microwave and Optical Technology Letters | Year: 2013

A 0.18-μm CMOS wideband passive mixer fully integrated with baluns in IBM7HP process is reported. The mixer exhibits wideband operation, despite the intrinsic narrow-band magnitude balance of passive baluns. Very low DC offset, of less than 3 mV, is achieved without any DC cancellation circuits, due to high LO-RF isolation. At the RF frequency of 2.4 GHz, the combined IF differential outputs provide conversion loss (CL) of 7.5 dB, input 1 dB compression point (IP1dB) of 6.2 dBm, and input third-order intercept point (IIP3) of 15.5 dBm. This mixer exhibits broad-band RF impedance matching with reflection coefficient magnitude better than -9.6 dB through the RF frequency range from 1 to 12 GHz. The CL of 10.1-12.9 dB, IP1dB of 8.6-14.4 dBm, and IIP3 of 16-22.2 dBm are achieved at this frequency range for broad-band applications. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:23-27, 2013; View this article online at DOI 10.1002/mop.27226 Copyright © 2012 Wiley Periodicals, Inc.

Loading NAVSEA Crane collaborators
Loading NAVSEA Crane collaborators