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Liu F.,National Laboratory of Parallel Distributed Processing | Tan Q.,National Laboratory of Parallel Distributed Processing | Chen G.,Lingcore Laboratory | Song X.,Portland State University | And 2 more authors.
IET Computers and Digital Techniques | Year: 2010

As an important part of many processors's floating point unit, fused multiply-add unit performs a multiplication followed immediately by an addition. In IBM POWER6 microprocessor's fused multiply-add unit, a fast 128-bit floating-point end-around-carry (EAC) adder is proposed. Very few algorithmic details exist in today's literature about this adder. In this study, a complete designed EAC adder that can work independently as a regular adder is proposed. Details about the proposed EAC adder's arithmetic algorithms are described. In IBM's original EAC adder, the Kogge-Stone tree has been chosen for its high performance on ASIC technology. In this study, the authors present a comparative study on different parallel prefix trees which are used in the design of our new EAC adder targeting field programmable gate array (FPGA) technology. Our study highlights the main performance differences among 14 different architecture configurations focusing on the area requirements and the critical path delay. The experimental results show that there is one architecture configuration with the lower area requirement and the higher performance. © 2010 © The Institution of Engineering and Technology.


Chen G.,Lingcore Laboratory | Liu F.,National Laboratory of Parallel Distributed Processing
IEEE Transactions on Computers | Year: 2010

Adder circuits have been extensively studied. Their formal properties are well known, but the proofs are either incomplete or difficult to find. This short contribution intends to integrate all formal proofs related to adders in a single place and to add the details when necessary. The presentation is accessible to general VLSI designer. Another goal of this study is to put together relevant materials for the preparation of further formal studies in computer arithmetic. The presentation is made as concise as possible. © 2006 IEEE.


Liu F.,National Laboratory of Parallel Distributed Processing | Tan Q.,National Laboratory of Parallel Distributed Processing | Chen G.,Lingcore Laboratory
Mathematical and Computer Modelling | Year: 2010

The paper presents an algebraic analysis for the correctness of prefix-based adders. In contrast to using higher-order functions and rewriting systems previously, we harness first-order recursive equations for correctness proof. A new carry operator is defined in terms of a semi-group with the set of binary bits. Both sequential and parallel addition algorithms are formalized and analyzed. The formal analysis on some special prefix adder circuits demonstrates the effectiveness of our algebraic approach. This study lays an underpinning for further understanding on computer arithmetic systems. © 2010 Elsevier Ltd.


Liu F.,National Laboratory of Parallel Distributed Processing | Abbasi N.,Concordia University at Montréal | Tan Q.,National Laboratory of Parallel Distributed Processing
International Journal of Electronics | Year: 2010

Rapid system modelling and early evaluation of design characterisation are central to design space exploration. SystemC is used widely for system-level modelling, but it lacks the semantics to capture power consumption. The article presents a novel high-level power estimation methodology based on SystemC and aspect-oriented programming (AOP). Using a composite pattern, our methodology is applicable to the power estimation of a complex system. The proposed strategies support macro-models with multiple features. The experimental results are illustrated with case studies. © 2010 Taylor & Francis.


Liu F.,National Laboratory of Parallel Distributed Processing | Tan Q.,National Laboratory of Parallel Distributed Processing | Song X.,Portland State University | Chen G.,Lingcore Laboratory
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | Year: 2010

In this paper, we present a general architecture of hybrid prefix/carry-select adder. Based on this architecture, we formalize the hybrid adder's algorithm using the first-order recursive equations and develop a proof framework to prove its correctness. Since several previous adders in the literature are special cases of this general architecture, our methodology can be used to prove the correctness of different hybrid prefix/carry-select adders. The formal proof for a special hybrid prefix/carry-select adder shows the effectiveness of the algebraic structures built in this paper. © Springer-Verlag Berlin Heidelberg 2010.


Liu F.,National Laboratory of Parallel Distributed Processing | Tan Q.,National Laboratory of Parallel Distributed Processing | Song X.,Portland State University | Abbasi N.,Concordia University at Montréal
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI | Year: 2010

The paper presents a novel high-level power modeling and estimation framework. The approach is based on a synergic integration of aspect-oriented programming(AOP) and SystemC. Macro module modeling and power estimation are harnessed. A case study demonstrates the effectiveness of the proposed method. © 2010 ACM.

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