Entity

Time filter

Source Type

Shijiazhuang, China

Deng X.,University of Electronic Science and Technology of China | Wen Y.,University of Electronic Science and Technology of China | Wang X.,University of Electronic Science and Technology of China | Wang Y.,National Key Laboratory of ASIC | And 3 more authors.
Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 | Year: 2014

An optimized linearly graded field limiting ring (LG-FLR) termination structure for high voltage power 4H-SiC diodes has been presented in this paper. Simulated optimized designs were performed to investigate SiC field limiting ring termination, and determine the optimum guard ring spacing for planar diodes. Simulated results show that the LG-FLR provides a smooth and uniform surface electric field distribution without field spikes. In addition, LG-FLR consumes smaller termination length than conventional FLR structures. Implanted 4H-SiC JBS diodes with optimized guard ring designs were fabricated and results correlated to simulation. Experimental breakdown values of 5 kV for LG-FLR structure with 35 rings were in good agreement with simulated results. © 2014 IEEE. Source


Wei H.,Hebei Semiconductor Research Institute | Wei H.,National Key Laboratory of ASIC | Gao X.,Hebei Semiconductor Research Institute | Wu H.,Hebei Semiconductor Research Institute | And 2 more authors.
2012 International Conference on Computational Problem-Solving, ICCP 2012 | Year: 2012

The design, fabrication, and experimental characteristics of GaAs PIN diodes are presented for W band monolithic integrated switches. The diodes with 20m m-diameter were used and showed a turn on voltage of 1.32 V, and a switching cutoff frequency of 4.0 THz. The monolithic integrated switches employed microstrip transmission lines and backside via holes for low-inductance signal grounding. A radial stub-based design was used for on-chip biasing, and the high-frequency characteristics of the switches were verified by on-wafer W-band testing. The SPST PEN monolithic switch demonstrated a low minimum insertion loss of 1.1 dB at 92 GHz and 30 dB isolation, 1.8 dB insertion loss in the frequency band from 85 GHz to 95 GHz. © 2012 IEEE. Source


Wang X.-D.,University of Electronic Science and Technology of China | Deng X.-C.,University of Electronic Science and Technology of China | Wang Y.-W.,National Key Laboratory of ASIC | Wang Y.,National Key Laboratory of ASIC | And 2 more authors.
Chinese Physics B | Year: 2014

This paper describes the successful fabrication of 4H-SiC junction barrier Schottky (JBS) rectifiers with a linearly graded field limiting ring (LG-FLR). Linearly variable ring spacings for the FLR termination are applied to improve the blocking voltage by reducing the peak surface electric field at the edge termination region, which acts like a variable lateral doping profile resulting in a gradual field distribution. The experimental results demonstrate a breakdown voltage of 5 kV at the reverse leakage current density of 2 mA/cm 2 (about 80% of the theoretical value). Detailed numerical simulations show that the proposed termination structure provides a uniform electric field profile compared to the conventional FLR termination, which is responsible for 45% improvement in the reverse blocking voltage despite a 3.7% longer total termination length. © 2014 Chinese Physical Society and IOP Publishing Ltd. Source


Deng X.-C.,University of Electronic Science and Technology of China | Fei Y.,National Key Laboratory of ASIC | Sun H.,University of Electronic Science and Technology of China | Rao C.-Y.,University of Electronic Science and Technology of China | And 3 more authors.
ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings | Year: 2012

An etched implanted junction termination extension (JTE) is presented for high-voltage 4H-SiC JBS rectifiers. Unlike the conventional JTE structure, the proposed structure utilizes multiple etching steps to achieve the optimum JTE concentration range. Experimental and simulation results show that the JBS rectifier with etched JTE can improve the blocking performance compared to a conventional JTE structure and decrease the sensitivity of any possible variation in processing condition. The fabricated SiC JBS rectifier showed the forward on-state voltage characteristic is 1.3V at room temperature and the blocking voltage of 1.2kV. © 2012 IEEE. Source


Wan X.-J.,CAS Institute of Semiconductors | Wang X.-L.,CAS Institute of Semiconductors | Wang X.-L.,ISCAS XJTU Joint Laboratory of Functional Materials and Devices for Informatics | Wang X.-L.,Xian Jiaotong University | And 9 more authors.
Chinese Physics Letters | Year: 2013

The valence band offset (VBO) of an Al0.17Ga0.83N/GaN heterojunction is determined to be 0.13 ± 0.07 eV by x-ray photoelectron spectroscopy. From the obtained VBO value, the conduction band offset (CBO) of ∼0.22 eV is obtained. The results indicate that the Al0.17Ga0.83N/GaN heterojunction exhibits a type-I band alignment. © 2013 Chinese Physical Society and IOP Publishing Ltd. Source

Discover hidden collaborations