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Austin, TX, United States

—National Instruments Corporation, or NI, is an American company with international operation. Headquartered in Austin, Texas, it is a producer of automated test equipment and virtual instrumentation software. Common applications include data acquisition, instrument control and machine vision.In 2012, the company sold products to more than 35,000 companies with revenues of $1.12 billion USD. Wikipedia.


Patent
National Instruments | Date: 2015-12-18

System and method for validating a program under a specified model of computation. The model of computation may be related to the synchronous statechart model of computation. A program may be received that specifies a plurality of operations using a variable within a logical tick such that the variable has multiple values within the logical tick. The program may be statically analyzed according to a specified model of computation that specifies program execution based on logical ticks, which may include determining that the program has deterministic semantics that specify deterministic results for each logical tick during execution of the program, including specifying deterministic results of the plurality of operations performed within the logical tick. The program may be validated in accordance with the specified model of computation in response to the determining. Such techniques may allow validation of a larger set of programs than conventional models while maintaining deterministic results.


Patent
National Instruments | Date: 2015-12-18

System and method for validating a program under a specified model of computation. The model of computation may be related to the synchronous statechart model of computation. A program may be received that specifies a plurality of operations using a variable within a logical tick such that the variable has multiple values within the logical tick. The program may be statically analyzed according to a specified model of computation that specifies program execution based on logical ticks, which may include determining that the program has deterministic semantics that specify deterministic results for each logical tick during execution of the program, including specifying deterministic results of the plurality of operations performed within the logical tick. The program may be validated in accordance with the specified model of computation in response to the determining. Such techniques may allow validation of a larger set of programs than conventional models while maintaining deterministic results.


Embodiments are described of devices and methods for processing a signal using a plurality of vector signal generators (VSGs). A digital signal may be provided to a plurality of signal paths, each of which may process a respective frequency band of the signal, the respective frequency bands having regions of overlap. The gain and phase of each signal path may be adjusted such that continuity of phase and magnitude are preserved through the regions of overlap. The adjustment of gain and phase may be accomplished by a complex multiply with a complex calibration constant. The calibration constant may be determined for each signal path by comparing the gain and phase of one or more calibration tones generated within each region of overlap. Each signal path may comprise a VSG to convert the respective signal to an analog signal, which may be combined to obtain a composite signal.


Patent
National Instruments | Date: 2015-08-28

Systems and methods for scheduling data egress using a time-sensitive (TS) network switch. The TS network switch may include a functional unit, a plurality of ports, and a plurality of queues. Each port may be associated with a set of network addresses for TS packets and may be configured with a set of egress periods. Each queue may be associated with a TS packet type and a port. The functional unit may be configured to receive TS packets asynchronously from a network node via a first port, determine a second port for egressing a TS packet, determine an egress period for egressing the TS packet, determine that the TS packet cannot currently be egressed from the second port, queue the TS packet in a first queue, where the first queue is associated with the second port, and egress the TS packet in the respective time window from the second port.


Patent
National Instruments | Date: 2015-02-27

System and method for editing a graphical diagram. A graphical diagram, such as a graphical program, is displayed on a display device. User input may be received editing the graphical diagram, thereby generating an edited graphical diagram. Placement of one or more elements in the graphical diagram may be adjusted in response to the editing based on determined forces applied to the one or more elements in the edited graphical diagram based on the said editing, resulting in an adjusted edited graphical diagram. The adjusted edited graphical diagram may be displayed on the display device, which may include displaying an animation illustrating the movement of the elements to an equilibrium state in which the forces balance and movement ceases. The editing, adjusting, and displaying may be performed sequentially and/or concurrently, as desired.

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