National Center for Advanced Packaging Co.

Wuxi, China

National Center for Advanced Packaging Co.

Wuxi, China
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Patent
National Center for Advanced Packaging Co. | Date: 2015-05-04

A solution for dissipating heat generated from high power chip packages, e.g., a fcBGA package, wbBGA package, 2.5D/3D TSV package, PoP, etc. The heat dissipation system may include a high power chip package including a high power chip. A micro-jet may be attached to the high power chip. A micro-pump may be in fluidic communication with the micro-jet. A heat exchanger may be in fluidic communication with the micro-pump. The high power chip package is assembled on the same PCB with the micro-pump and the heat exchanger.


Patent
National Center for Advanced Packaging Co. | Date: 2014-04-15

A mechanical debonding method and system are provided. A mechanical debonding method, used to debond temporary bonding wafers formed by bonding a device wafer and a carrier wafer by an adhesive, includes: obtaining the height position of the adhesive through a thickness measurement apparatus; moving a cutting apparatus to a position between the device wafer and the carrier wafer based on the height position of the adhesive, then removing the adhesive at the edge of the temporary bonding wafers by the cutting apparatus; removing the carrier wafer from the temporary bonding wafers; cleaning the adhesive left on the surface of the device wafer.


Patent
National Center For Advanced Packaging Co. | Date: 2014-04-15

A TSV wafer thinning controlling method and system is provided, which can improve the accuracy of the wafer thinning technique. The system includes a chuck table used for carrying a wafer and a grinding device used for thinning the wafer; and further includes: an infrared sensor equipped on the chuck table or grinding device, and a measurement feedback system connected with the infrared sensor and the grinding device; wherein, the infrared sensor comprises an infrared emitting and receiving circuit, signal amplifying and filtering circuit and a data processor.


Patent
National Center For Advanced Packaging Co. | Date: 2014-05-07

A TSV front-top interconnection process is provided. In an embodiment of the present invention, the stress concentration area of a TSV copper pillar is eliminated, which reduces the possibility of generating delamination or cracks between an insulating layer and the substrate due to stress. Meanwhile, the defect of the existing process that the TSV copper pillar may expose after an electroplating and annealing process is re-used to achieve the interconnection between the TSV copper pillar and the metal redistribution layer.


Patent
National Center for Advanced Packaging Co. | Date: 2014-05-13

Techniques for fabricating fine-pitch micro-bumps are disclosed. According to one embodiment, a fabrication process may comprise the following steps: depositing a dielectric layer on a wafer; forming a pattern of through holes in the dielectric layer; depositing a seed metal layer on top of the dielectric layer and inside the through holes; depositing a layer of UBM metal on top of the seed metal layer (including inside the holes), and further filling the holes with a low melting point metal; performing chemical mechanical polishing (CMP) to remove conductive material(s) outside the holes and/or on the surface of the dielectric layer, such that the metal stacks of adjacent holes are insulated by the dielectric material between them; and etching the dielectric material surrounding the holes to cause the tip of the metal stacks to extend slightly higher than the surrounding dielectric surface, thereby forming fine-pitch micro-bumps.


Patent
National Center for Advanced Packaging Co. | Date: 2015-04-17

A method for polishing a polymer surface is provided by an embodiment of the present invention. The method includes: curing the polymer surface; polishing the polymer surface cured through a CMP process. By using the method for polishing a polymer surface provided by embodiments of the present invention, the mentioned problems in the prior art are solved. The uniformity of the polymer surface can be improved to <1% through a CMP process, which can meet the requirements of high density and small linewidth integration.


Patent
National Center for Advanced Packaging Co. | Date: 2015-06-16

An optical communication apparatus comprises a laser, a laser driver chip, a photodetector, an amplifier chip, an assembling plate and at least two I/O interfaces. The laser, the laser driver chip, the photodetector and the amplifier chip are disposed on the assembling plate. The laser is connected to the laser driver chip via transmission lines and the photodetector is connected to the amplifier chip via transmission lines. A plurality of conducting vias are formed in the assembling plate, the laser driver chip and the amplifier chip are respectively connected to different I/O interfaces via electrical transmission lines passing through the conducting vias. The laser is connected to an optical fiber to transmit optical signals, and the photodetector is connected to another optical fiber to receive optical signals. A method of assembling such an optical communication apparatus is also provided.


Patent
National Center for Advanced Packaging Co. | Date: 2014-08-28

An optical fiber assembly and a method of assembly thereof. The optical fiber assembly includes a support plate defining an array of support plate through holes, and an alignment template plate defining an array of alignment template plate through holes. At least one support plate through hole or alignment template plate through hole may be flared. At least one support plate through hole or alignment template plate through hole may include a compliant film.


A method for avoiding using CMP for eliminating electroplated copper facets and reusing barrier layer in the back end of line (BEOL) manufacturing processes. Electropolishing is employed to remove the deposited surface metal, stopping at the barrier layer to form a smooth surface that may be utilized in subsequent steps. The method is suitable for the electropolishing of metal surfaces after formation of filled vias for through-silicon via processes employing metals such as copper, tungsten, aluminum, or alloys thereof. The remaining barrier layer may be reused to fabricate the redistribution layer.


Patent
National Center for Advanced Packaging Co. | Date: 2015-10-29

A method of manufacturing a fan out wafer level package comprises: preparing conductive projections on an upper surface of a chip; mounting the chip on a carrier with the upper surface of the chip facing upwards; plastic packaging the chip to form a plastic packaging body with tops of the conductive projections being disposed outside the plastic package body; and implementing a redistribution line processing on the plastic package body. With this method, chips can be made small and thin and the manufacturing processes can be simplified.

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