MPhase Technologies Inc. | Date: 2007-04-24
Nanobatteries, Microelectromechanical systems and telecommunications and data communications equipment, namely DSL splitters and filters and IPTV software.
Agency: Department of Defense | Branch: Army | Program: STTR | Phase: Phase I | Award Amount: 99.69K | Year: 2007
With the increased need to power portable electronic devices for long extended periods, a new approach needs to be taken for finding suitable battery technologies to meet this objective. This STTR proposal utilizes a novel miniature reserve battery design based on recent research in the manipulation of fluids on superhydrophobic nanostructured surfaces, to achieve the performance and life cycle objectives to power the SRAM module requirements of this proposal. In our design, long term stability and shelf life is achieved by initially separating the active materials of the power cell during storage, and controlling the activation of the cell until needed to provide power. In Phase 1 we will characterize the design, conduct capacity and stability measurements of a reserve style power cell based on Li/Mn02 chemistry and set the stage for a Phase 2 plan for an arrayed battery configuration capable of powering the SRAM for long term continuous use in temperature ranges from -400C to greater than 1000C.
MPhase Technologies Inc. | Date: 2009-03-02
LONG-TERM ELECTRICAL POWER SUPPLY, namely, A BATTERY COMPRISED OF AN ELECTROWETTABLE NANOSTRUCTURED POROUS MEMBRANE AND A PLURALITY OF CELLS THAT ARE INTELLIGENTLY ACTIVATED IN A SEQUENTIAL MANNER WHEN ELECTRICAL POWER IS REQUIRED, WHEREIN WHEN A FIRST CELL OF THE BATTERY FALLS BELOW A PRESET VOLTAGE THRESHOLD A SECOND CELL IS ACTIVATED TO REPLACE THE FIRST CELL.
MPhase Technologies Inc. | Date: 2014-03-03
Agency: Department of Defense | Branch: Army | Program: STTR | Phase: Phase II | Award Amount: 749.70K | Year: 2008
The purpose of the proposed Phase 2 work is to create a low-cost multi-cell battery capable of constant power draw in the 100 nA range to provide back-up power source for an SRAM memory chip such as those used in FPGA (field programmable gate array) architectures. The battery to be developed under the current work program will proved for up to 30 year active life (under 100 nA load). This will be achieved by utilizing an array of sub-cells that can be individually triggered to deliver the required amount of energy while keeping the rest of the array in the reserve (unused, fresh) state.