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Kleveland B.,MoSys | Miller M.J.,MoSys | David R.B.,MoSys | Patel J.,MoSys | And 7 more authors.
IEEE Micro

Memory access rate is a primary performance bottleneck in high-performance networking systems. The MoSys Bandwidth Engine family of integrated circuits provides a significant improvement in effective memory performance by using high-speed serial I/O's, many banks of memory, a low-latency, highly efficient protocol, and intelligence within the device. The first member of the family can perform 2 billion 72-bit reads per second or 1 billion read-modify-write operations per second. © 2013 IEEE. Source

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