Aliso Viejo, CA, United States
Aliso Viejo, CA, United States

Microsemi Corporation is a manufacturer of defense, security, aerospace, enterprise, communications, medical, alternative energy, and industrial products for power-related applications. Major products offered by Microsemi are analog devices, mixed-signal and RF integrated circuits, customizable system-on-chips , FPGAs, and complete subsystems. It has been based in Aliso Viejo, California since 2011, when it relocated its headquarters from Irvine, California. Microsemi has plants in California, Arizona, Massachusetts, Texas, Florida, Ireland, China and Canada. Wikipedia.

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Patent
Microsemi | Date: 2016-11-09

A hysteretic power converter constituted of: a switched mode power supply comprising an inductor, an electronically controlled switch and an output capacitor, the switch arranged to alternately open and close a loop with the inductor and a power source; a hysteretic comparator, a first input coupled to a feedback connection and arranged to receive from the feedback connection a feedback signal providing a first representation of the voltage across the output capacitor, the electronically controlled switch opened and closed responsive to an output of the hysteretic comparator; a reference voltage source arranged to generate a reference voltage, the generated reference voltage coupled to a second input of the hysteretic comparator; and a voltage coupler, the voltage coupler arranged to couple a second representation of the voltage across the output capacitor to the second input of the hysteretic comparator, such that the second representation is added to the generated reference voltage.


A powering arrangement for use with reverse power feeding arranged to detect an improperly connected POTS phone going off-hook by: measuring a first current flow from a power sourcing equipment; identifying a rapid first increase in current flow from the measured first current flow, the rapid increase defined as a rate of change greater than a predetermined minimum rate of change; identifying a second increase in current flow from the measured first current flow, the identified second increase greater than a predetermined minimum amount; confirming that the identified second increase in current flow is maintained for at least a predetermined amount of time beginning with the identified first increase in current flow; and outputting an error signal to the power sourcing equipment in the event of the identified condition.


With the increasing usage of mobile devices for communication, the need for wireless base-stations deployed in strategic locations is becoming increasingly important. The increased bandwidths being transmitted between the base-station and the mobile device has mandated that enhanced transmission formats and techniques be deployed, and, in order to operate correctly, these techniques require a tight synchronization in both time/phase, and in frequency, between the various base-stations serving a general area. Due to the need to establish the geographic location of the mobile device with a high degree of accuracy, it is also necessary to establish the location of the serving base-stations with a high degree of accuracy. The invention disclosed herein provides robust and practical methods for synchronizing base-stations, as well as providing for accurate location, by leveraging the usage of global navigation satellite systems receivers in conjunction with network based schemes for packet-based (time/phase/frequency) synchronization.


Patent
Microsemi | Date: 2017-03-01

A power supply unit (120) includes a plurality of the interface ports (132) and a plurality of power delivery units (130), each coupled to one of the interface ports (132) and configured to extract power from data signals communicated over the interface ports (132) by remote devices (110). A sharing circuit (145) is coupled to each of the power delivery units (130) for generating a power supply voltage from the power extracted from the data signals. A controller (155) is configured to generate a communication line power loss estimate for each of the interface ports (132) and configure the power delivery units to balance amounts of power supplied by each of the remote devices (110) based on the communication line power loss estimates.


An architecture disposed in an integrated circuit for in-application programming of flash-based programmable logic devices includes a processor coupled to a processor system bus. An I/O peripheral is coupled to the processor over the system bus and is also coupled to an off-chip data source. A programmable logic device fabric includes flash-based programmable devices. A program controller is coupled to the flash-based programmable devices. An in-application programming controller is coupled to the program controller and is coupled to the processor over the system bus.


Patent
Microsemi | Date: 2017-06-21

A PoE system (10) PSE, constituted of: a power source input (60); a classification functionality arranged to determine the class of a PD (40); a memory arranged to store thereon the determined class; a timing functionality arranged to output the length of a power interruption to the power source input (60); and a control circuitry (63); wherein, responsive to an indication of the timing functionality that the power interruption length is greater than a predetermined time value, the control circuitry (63) is arranged to initiate the class determination of the classification functionality, and wherein, responsive to an indication of the timing functionality that the power interruption length is not greater than the predetermined time value, the control circuitry (63) is arranged to: supply power from the power source input (60) to the PD (40) responsive to the stored determined class; and not initiate the class determination of the classification functionality prior to the power supplying.


Grant
Agency: European Commission | Branch: H2020 | Program: RIA | Phase: FETPROACT-01-2016 | Award Amount: 4.94M | Year: 2017

This consortium will pioneer disruptive technology for bio-electronic medicine to provide much needed therapies for cardiorespiratory and functional neurological disease. The technology implements small neural networks known as central pattern generators (CPG) to deliver fit-and-forget bio-electronic implants that respond to physiological feedback in real time, are safer, simpler, non-invasive, and have autonomy exceeding the patient lifespan. Multichannel neurons will be made to compete on analogue chips to obtain flexible motor sequences underpinned by a wide parameter space. By building large scale nonlinear optimization tools and using them to assimilate electrophysiological data, we will develop a method for automatically finding the network parameters that accurately reproduce biological motor sequences and their adaptation to multiple physiological inputs. In this way, we will have resolved the issue of programming analogue CPGs which has long been the obstacle to using neural chips in medicine. An adaptive pacemaker will be constructed, tested, validated and trialled on animal models of atrio-ventricular block and left bundle branch block to demonstrate the benefits of heart rate adaptation, beat-to-beat cardiac resynchronization and respiratory sinus arrhythmia. By providing novel therapy for arrhythmias, heart failure and their comorbidities such as sleep apnoea and hypertension, CResPace will extend patients life and increase quality of life.


Grant
Agency: European Commission | Branch: H2020 | Program: IA | Phase: FoF-12-2015 | Award Amount: 6.34M | Year: 2015

The total EU electronics industry employs 20.5 million people, sales exceeding 1 trillion and includes 396,000 SMEs. It is a major contributor to EU GDP and its size continues to grow fueled by demand from consumers to many industries. Despite its many positive impacts, the industry also faces some challenges connected with the enormous quantity of raw materials that it needs for sustainability, the huge quantity of Waste Electrical, Electronics Equipment (WEEE) generated and the threat of competition from Asia. To sustain its growth, to manage the impact of WEEE and to face the competition from Asia, the industry needs innovations in key areas. One such area is the drive for ultra-miniaturisation/ultlra-functionality of equipment. The key current road block/limitation to achieving the goal of ultra-miniaturisation/functionality is how to increase the component density on the printed circuit board (PCB). This is currently limited by the availability of hyper fine pitch solder powder pastes. FineSol aims to deliver at first stage an integrated production line for solder particles with size 1-10 m and to formulate solder pastes containing these particles. Thus, by proper printing methods (e.g. screen and jet printing) the fabrication of PCBs with more than double component density will be achieved. Consequently, this would effectively enable more than a doubling of the functions available on electronic devices such as cell phones, satellite navigation systems, health devices etc. The successful completion of the FineSol project would lift the ultra-miniaturisation/functionality road block and also enable reduction in raw material usage, reduction in WEEE, reduction in pollution and associated health costs and also a major reduction in EU energy demand with all its indirect benefits for environment and society.


Grant
Agency: European Commission | Branch: H2020 | Program: IA | Phase: FOF-03-2016 | Award Amount: 6.04M | Year: 2016

Manufacturing represents approximately 21 % of the EUs GDP and 20 % of its employment, providing more than 30 million jobs in 230 000 enterprises, mostly SMEs. Moreover, each job in industry is considered to be linked to two more in related services. European manufacturing is also a dominant element in international trade, leading the world in areas such as automotive, machinery and agricultural engineering. Already threatened by both the lower-wage economies and other high-tech rivals, the situation of EU companies was even made more difficult by the downturn. The Z-Fact0r consortium has conducted an extensive state-of-the-art research (see section 1.4) and realised that although a number of activities (see section 1.3) have been trying to address the need for zero-defect manufacturing, still there is a vast business opportunity for innovative, high-ROI (Return on Investment) solutions to ensure, better quality and higher productivity in the European manufacturing industries. The Z-Fact0r solution comprises the introduction of five (5) multi-stage production-based strategies targeting (i) the early detection of the defect (Z-DETECT), (ii) the prediction of the defect generation (Z-PREDICT), (iii) the prevention of defect generation by recalibrating the production line (multi-stage), as well as defect propagation in later stages of the production (Z-PREVENT), (iv) the reworking/remanufacturing of the product, if this is possible, using additive and subtractive manufacturing techniques (Z-REPAIR) and (v) the management of the aforementioned strategies through event modelling, KPI (key performance indicators) monitoring and real-time decision support (Z-MANAGE). To do that we have brought together a total of thirteen (13) EU-based partners, representing both industry and academia, having ample experience in cutting-edge technologies and active presence in the EU manufacturing.


Grant
Agency: GTR | Branch: Innovate UK | Program: | Phase: Collaborative Research & Development | Award Amount: 793.57K | Year: 2016

NEMICA is a UK collaborative research and development project between Microsemi, Moog and the Universities of Bristol and Southampton. The project aims to develop reprogrammable memories and gate arrays based on Nano-Relay technology that are capable of withstanding long term exposure to 225oC and/or 100Mrads. The primarily target application will be avionic actuator systems but the technology has markets in space, transportation and down hole drilling.

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