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Rahmani M.B.,RMIT University | Rahmani M.B.,Microelectronics Research Laboratory | Keshmiri S.H.,Microelectronics Research Laboratory | Yu J.,RMIT University | And 7 more authors.
Sensors and Actuators, B: Chemical | Year: 2010

In this work, MoO3 was thermally evaporated onto gold interdigital fingers on quartz substrates and characterized using X-ray diffraction (XRD), scanning electron microscopy (SEM), and transmission electron microscopy (TEM) techniques. The deposited MoO3 consist of stratified long rectangles (average length of 50 μm width of 5 μm and thickness of 500 nm) which are predominantly orthorhombic (α-MoO3). Each of these plates was composed of many nano-thick layers (average ∼30 nm) placed by Van der Waals forces on top of each other forming lamellar patterns. The devices were used as sensors and exhibited considerable change in surface conductivity when exposed to NO2 and H2 gases at elevated temperature of 225 °C. The structural and gas sensing properties of thermally evaporated MoO3 thin films were investigated. © 2009 Elsevier B.V. All rights reserved. Source


Breedon M.,RMIT University | Rahmani M.B.,RMIT University | Rahmani M.B.,Microelectronics Research Laboratory | Keshmiri S.-H.,Microelectronics Research Laboratory | And 2 more authors.
Materials Letters | Year: 2010

Interconnected ZnO nanowires were grown in a two-stage process, using spray pyrolysis deposited ZnO seed layers as a nucleation platform for subsequent hydrothermal growth. We present a comparison between the effect of these spray pyrolysis deposited seed layers and well-ordered sputter deposited seed layers, along with their respective ZnO nano-morphologies that were obtained via hydrothermal growth. It will be shown that the growth of interconnected ZnO nanowires was influenced by the physical and crystallographic orientations of the underlying seed crystallites. Sputtered seed layers resulted in fairly vertical nanorods which were approximately 80 nm in width, while seed layers deposited by spray pyrolysis resulted in arrays of interconnected ZnO nanowires measuring approximately 15 nm in width. © 2009 Elsevier B.V. All rights reserved. Source


Fathi A.,Microelectronics Research Laboratory | Khoei A.,Microelectronics Research Laboratory | Hadidi K.,Microelectronics Research Laboratory
Journal of Circuits, Systems and Computers | Year: 2015

This paper describes the design of a high speed min/max architecture based on a new current comparator. The main advantage of the proposed circuit which employs a novel preamplifier-latch comparator is the higher operating frequency feature in comparison with previous works. Because the comparator can work in voltage mode, the min/max structure can be redesigned either in voltage or current mode. The designed comparator is refreshed without any external clock. Therefore, it does not degrade the speed performance of proposed min/max structure. These features along with low power consumption qualify the proposed architecture to be widely used in high speed fuzzy logic controllers (FLCs). Post-layout simulation results confirm 3.4 GS/s comparison rate with 9-bit resolution for a 0.9 V peak-to-peak input signal range for the comparator and 800 MHz operating frequency for min/max circuit. The power consumption of whole structure is 912 μW from a 1.8 V power supply using TSMC 0.18-μm CMOS technology. © 2015 World Scientific Publishing Company. Source

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